Analog Devices ADP1879 Evaluation Board ADP1879-1.0-EVALZ ADP1879-1.0-EVALZ Hoja De Datos

 

Rev. B | Page 21 of 40 

A current-limit violation occurs when the current across the 
source and drain of the low-side MOSFET exceeds the current-
limit setpoint. When 32 current-limit violations are detected, 
the controller enters idle mode and turns off the MOSFETs for 
6 ms, allowing the converter to cool down. Then, the controller 
reestablishes soft start and begins to cause the output to ramp 
up again (see Figure 73). While the output ramps up, the current 
sense amplifier output is monitored to determine if the violation is 
still present. If it is still present, the idle event occurs again, followed 
by the full chip, power-down sequence. This cycle continues 
until the violation no longer exists. If the violation disappears, 
the converter is allowed to switch normally, maintaining 
regulation. 

The 

 employ internal MOSFET drivers for  

the external high- and low-side MOSFETs. The low-side 
synchronous rectifier not only improves overall conduction 
efficiency, but it also ensures proper charging of the bootstrap 
capacitor located at the high-side driver input. This is beneficial 
during startup to provide sufficient drive signal to the external 
high-side MOSFET and to attain fast turn-on response, which is 
essential for minimizing switching losses. The integrated high- 
and low-side MOSFET drivers operate in complementary 
fashion with built-in anti cross conduction circuitry to prevent 
unwanted shoot through current that may potentially damage the 
MOSFETs or reduce efficiency because of excessive power loss.  

A power saving mode is provided in the 

. The 

operates in the discontinuous conduction mode (DCM) and 
pulse skips at light to medium load currents. The controller outputs 
pulses as necessary to maintain output regulation. Unlike the 
continuous conduction mode (CCM), DCM operation prevents 
negative current, thus allowing improved system efficiency at 
light loads. Current in the reverse direction through this pathway, 
however, results in power dissipation and, therefore, a decrease in 
efficiency. 

To minimize the chance of negative inductor current buildup, 
an on-board zero-cross comparator turns off all high- and low-
side switching activities when the inductor current approaches 
the zero current line, causing the system to enter idle mode, 
where the high- and low-side MOSFETs are turned off. To ensure 
idle mode entry, a 10 mV offset, connected in series at the SW 
node, is implemented (see Figure 75).  

As soon as the forward current through the low-side MOSFET 
decreases to a level where  

10 mV = I

 × R

 

the zero-cross comparator (or I

REV

 comparator) emits a signal to 

turn off the low-side MOSFET. From this point, the slope of the 
inductor current ramping down becomes steeper (see Figure 76) 
as the body diode of the low-side MOSFET begins to conduct 
current and continues conducting current until the remaining 
energy stored in the inductor has been depleted. 

09

44

1-

07

3

09

441

-07

4

094

41-

075