Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

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SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

All the Masters can normally access all the Slaves. However, some paths do not make sense, for example allowing
access from the Cortex-M4 S Bus to the Internal ROM. Thus, these paths are forbidden or simply not wired, and shown
as “-” in the following table

Bus Matrix provides one decoder for every AHB Master Interface. The decoder offers each AHB Master several memory
mappings. In fact, depending on the product, each memory area may be assigned to several slaves. Booting at the same
address while using different AHB slaves (i.e. internal ROM or internal Flash) becomes possible.

The Bus Matrix provides some speculative bus granting techniques in order to anticipate access requests from some
masters. This mechanism allows to reduce latency at first accesses of a burst or single transfer. The bus granting
mechanism allows to set a default master for every slave. 

At the end of the current access, if no other request is pending, the slave remains connected to its associated default
master. A slave can be associated with three kinds of default masters: no default master, last access master and fixed
default master.

At the end of the current access, if no other request is pending, the slave is disconnected from all masters. No Default
Master suits low power mode.

At the end of the current access, if no other request is pending, the slave remains connected to the last master that
performed an access request.

At the end of the current access, if no other request is pending, the slave connects to its fixed default master. Unlike last
access master, the fixed master doesn’t change unless the user modifies it by a software action (field FIXED_DEFMSTR
of the related MATRIX_SCFG).

To change from one kind of default master to another, the Bus Matrix user interface provides the Slave Configuration
Registers, one for each slave, that allow to set a default master for each slave. The Slave Configuration Register
contains two fields:

DEFMSTR_TYPE and FIXED_DEFMSTR. The 2-bit DEFMSTR_TYPE field allows to choose the default master type (no
default, last access master, fixed default master) whereas the 4-bit FIXED_DEFMSTR field allows to choose a fixed

Slaves

Masters

0 1 

2

3

Cortex-M4 

I/D Bus

Cortex-M4 

S Bus

PDC

CRCCU

0

Internal SRAM

-

X

X

X

1

Internal ROM

X

-

X

X

2

Internal Flash

X

-

-

X

3

External Bus Interface

-

X

X

X

4

 Peripheral Bridge

-

X

X

-