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12.4.3 Exception Model
This section describes the exception model.
12.4.3.1 Exception States
Each exception is in one of the following states:
Inactive
The exception is not active and not pending.
Pending
The exception is waiting to be serviced by the processor.
An interrupt request from a peripheral or from software can change the state of the corresponding interrupt to pending.
Active
An exception is being serviced by the processor but has not completed.
An exception handler can interrupt the execution of another exception handler. In this case, both exceptions are in the
active state.
active state.
Active and Pending
The exception is being serviced by the processor and there is a pending exception from the same source.
12.4.3.2 Exception Types
The exception types are:
Reset
Reset is invoked on power up or a warm reset. The exception model treats reset as a special form of exception. When
reset is asserted, the operation of the processor stops, potentially at any point in an instruction. When reset is
deasserted, execution restarts from the address provided by the reset entry in the vector table. Execution restarts as
privileged execution in Thread mode.
reset is asserted, the operation of the processor stops, potentially at any point in an instruction. When reset is
deasserted, execution restarts from the address provided by the reset entry in the vector table. Execution restarts as
privileged execution in Thread mode.
Non Maskable Interrupt (NMI)
A non maskable interrupt (NMI) can be signalled by a peripheral or triggered by software. This is the highest priority
exception other than reset. It is permanently enabled and has a fixed priority of -2.
exception other than reset. It is permanently enabled and has a fixed priority of -2.
NMIs cannot be:
Masked or prevented from activation by any other exception.
Preempted by any exception other than Reset.
Hard Fault
A hard fault is an exception that occurs because of an error during exception processing, or because an exception
cannot be managed by any other exception mechanism. Hard Faults have a fixed priority of -1, meaning they have higher
priority than any exception with configurable priority.
cannot be managed by any other exception mechanism. Hard Faults have a fixed priority of -1, meaning they have higher
priority than any exception with configurable priority.
Memory Management Fault (MemManage)
A Memory Management Fault is an exception that occurs because of a memory protection related fault. The MPU or the
fixed memory protection constraints determines this fault, for both instruction and data memory transactions. This fault is
used to abort instruction accesses to Execute Never (XN) memory regions, even if the MPU is disabled.
fixed memory protection constraints determines this fault, for both instruction and data memory transactions. This fault is
used to abort instruction accesses to Execute Never (XN) memory regions, even if the MPU is disabled.
Bus Fault
A Bus Fault is an exception that occurs because of a memory related fault for an instruction or data memory transaction.
This might be from an error detected on a bus in the memory system.
This might be from an error detected on a bus in the memory system.
Usage Fault
A Usage Fault is an exception that occurs because of a fault related to an instruction execution. This includes:
An undefined instruction