Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Hoja De Datos

 924

SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

PWM_CCNTx [x=0..3]

0x40020214 [0], 0x40020234 [1], 0x40020254 [2], 0x40020274 [3]

Read-only

Only the first 16 bits (channel counter size) are significant.

Channel counter value. This register is reset when:

• the channel is enabled (writing CHIDx in the PWM_ENA register).

• the channel counter reaches CPRD value defined in the PWM_CPRDx register if the waveform is left aligned.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

CNT

15

14

13

12

11

10

9

8

CNT

7

6

5

4

3

2

1

0

CNT