Motorola MC68VZ328 Manuale Utente

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Exception Vectors
Interrupt Controller
9-3
 
programmable, but the lower 3 bits reflect the interrupt level that is being serviced. All interrupts are 
maskable. Writing a 1 to a bit in the interrupt mask register disables that interrupt. If an interrupt is 
masked, you can find out its status in the interrupt pending register.
9.2   
Exception Vectors
A vector number is an 8-bit number that can be multiplied by four to obtain the address of an exception 
vector. An exception vector is the memory location from which the processor fetches the address of a 
software routine that is used to handle an exception. Each exception has a vector number and an exception 
vector, as described in Table 9-1. User interrupts are part of the exception processing on the MC68VZ328, 
and the vector numbers for user interrupts are configurable. For additional information regarding exception 
processing, see the M68000 Family Programmer’s Reference Manual.
Table 9-1.   Exception Vector Assignment
Vector Number
Address Number
Space
1
Assignment
Hex
Decimal
Decimal
Hex
0
0
0
000
SP
Reset: initial SSP
2
1
1
4
004
SP
Reset: initial PC
2
2
8
008
SD
Bus error
3
3
12
00C
SD
Address error
4
4
16
010
SD
Illegal instruction
5
5
20
014
SD
Divide-by-zero
6
6
24
018
SD
CHK instruction
7
7
28
01C
SD
TRAPV instruction
8
8
32
020
SD
Privilege violation
9
9
36
024
SD
Trace
A
10
40
028
SD
Line 1010 emulator
B
11
44
02C
SD
Line 1111 emulator
C
12
48
030
SD
Unassigned, reserved
3
D
13
52
034
SD
Unassigned, reserved
3
E
14
56
038
SD
Unassigned, reserved
3
F
15
60
03C
SD
Uninitialized interrupt vector
10–17
16–23
64–92
040–05C
SD
Unassigned, reserved
3
18
24
96
060
SD
Spurious interrupt
4
19
25
100
064
SD
Level 1 interrupt autovector