HP A2Y15AV Manuale Utente

Datasheet, Volume 2

55

Processor Configuration Registers 

This is the base address for the Host Memory Mapped Configuration space. There is no 
physical memory within this 32 KB window that can be addressed. The 32 KB reserved 
by this register does not alias to any PCI 2.3 compliant memory mapped space. On 
reset, the Host MMIO Memory Mapped Configuration space is disabled and must be 
enabled by writing a 1 to MCHBAREN [Device 0, offset 48h, bit 0].

All the bits in this register are locked in Intel TXT mode.

The register space contains memory control, initialization, timing, and buffer strength 
registers; clocking registers; and power and thermal management registers.

All the bits in this register are Intel TXT lockable.

63:39

RO

0h

38:15

RW

000000h

Uncore

Host Memory Mapped Base Address (MCHBAR) 
This field corresponds to bits 38:15 of the base address Host 

Memory Mapped configuration space. BIOS will program this 

register resulting in a base address for a 32 KB block of 

contiguous memory address space. This register ensures that a 

naturally aligned 32 KB space is allocated within the first 512 GB 

of addressable memory space. System software uses this base 

address to program the Host Memory Mapped register set. All the 

bits in this register are locked in Intel TXT mode.

14:1

RO

0h

0

RW

0b

Uncore

MCHBAR Enable (MCHBAREN) 
0 = Disable. MCHBAR is disabled and does not claim any 

memory

1 = Enable. MCHBAR memory mapped accesses are claimed and 

decoded appropriately

This register is locked by Intel TXT.

15

RO

0h

14

RW-L

0b

Uncore

13:10

RO

0h