Freescale Semiconductor MPC5200B ユーザーズマニュアル
Registers
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor
10-19
10.3.2.6
Initiator Window 1 Base/Translation Address Register PCIIW1BTAR(RW) —MBAR +
0x0D74
0x0D74
16:23
Window 0
Translation
Address
For any translated bit (described above), the corresponding value here will be driven onto
the PCI address bus for the XL bus Window 0 address hit.
the PCI address bus for the XL bus Window 0 address hit.
Note: The Window Translation operation can not be turned off. If a direct mapping from
XL Bus to PCI space is desired, program the same value to both the Window Base
Address Register and Window Translation Address Register.
XL Bus to PCI space is desired, program the same value to both the Window Base
Address Register and Window Translation Address Register.
24:31
Reserved
Unused bits. Software should write zero to this register.
Table 1.
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Window 1 Base Address
Window 1 Address Mask
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
Window 1 Translation Address
Reserved
W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0