Jameco Electronics 3000 ユーザーズマニュアル
User’s Manual
113
Table 7-26. Quadrature Decoder Control Register
Quad Decode Control Register
(QDCR)
(Address = 0x91)
Bit(s)
Value
Description
7:6
00
Disable Quadrature Decoder 2 inputs. Writing a new value to these bits will not
cause Quadrature Decoder 2 to increment or decrement.
cause Quadrature Decoder 2 to increment or decrement.
01
This bit combination is reserved and should not be used.
10
Quadrature Decoder 2 inputs from Port F bits 3 and 2.
11
Quadrature Decoder 2 inputs from Port F bits 7 and 6.
5:4
These bits are ignored.
3:2
00
Disable Quadrature Decoder 1 inputs. Writing a new value to these bits will not
cause Quadrature Decoder 1 to increment or decrement.
cause Quadrature Decoder 1 to increment or decrement.
01
This bit combination is reserved and should not be used.
10
Quadrature Decoder 1 inputs from Port F bits 1 and 0.
11
Quadrature Decoder 1 inputs from Port F bits 5 and 4.
1:0
00
Quadrature Decoder interrupts are disabled.
01
Quadrature Decoder interrupt use Interrupt Priority 1.
10
Quadrature Decoder interrupt use Interrupt Priority 2.
11
Quadrature Decoder interrupt use Interrupt Priority 3.
Table 7-27. Quadrature Decoder Count Register
Quad Decode Count Register
(QDC1R)
(Address = 0x94)
(QDC2R)
(Address = 0x96)
Bit(s)
Value
Description
7:0
read
The current value of the Quadrature Decoder counter is reported.