Jameco Electronics 3000 ユーザーズマニュアル
10
Rabbit 3000 Microprocessor
2.1 The Rabbit 8-bit Processor vs. Other Processors
The Rabbit 3000 processor has been designed with the objective of creating practical sys-
tems to solve real world problems in an economical fashion. A cursory comparison of the
Rabbit 3000 compared to other processors with similar capabilities may miss certain Rab-
bit strong points.
tems to solve real world problems in an economical fashion. A cursory comparison of the
Rabbit 3000 compared to other processors with similar capabilities may miss certain Rab-
bit strong points.
•
The Rabbit is a processor that can be used to build a system in which EMI is nearly
absent, even at clock frequencies in excess of 40 MHz. This is due to the split power
supply, the clock doubler, the clock spectrum spreader and the PC board layout advice
(or processor core modules) that we provide. Low EMI is a huge timesaver for the
designer pressed to meet schedules and pass government EMI tests of the final product.
absent, even at clock frequencies in excess of 40 MHz. This is due to the split power
supply, the clock doubler, the clock spectrum spreader and the PC board layout advice
(or processor core modules) that we provide. Low EMI is a huge timesaver for the
designer pressed to meet schedules and pass government EMI tests of the final product.
•
Execution speed with the Rabbit is usually a pleasant surprise compared to other pro-
cessors. This is due to the well-chosen and compact instruction set partnered with and
excellent compiler and library. We have many benchmarks, comparing the Rabbit to
186, 386, 8051, Z180 and ez80 families of processors that prove the point.
cessors. This is due to the well-chosen and compact instruction set partnered with and
excellent compiler and library. We have many benchmarks, comparing the Rabbit to
186, 386, 8051, Z180 and ez80 families of processors that prove the point.
•
The Rabbit memory bus is an exceptionally efficient and very clean design. No external
logic is required to support static memory chips. Battery-backed external memory is
supported by built-in functionality. During reduced-power slow-clock operation the
memory duty cycle can be correspondingly reduced using built-in hardware, resulting
in low power consumption by the memories.
logic is required to support static memory chips. Battery-backed external memory is
supported by built-in functionality. During reduced-power slow-clock operation the
memory duty cycle can be correspondingly reduced using built-in hardware, resulting
in low power consumption by the memories.
The Rabbit external bus uses 2 clocks for read cycles and 3 clocks for write cycles. This
has many advantages compared to a single-clock design, and on closer examination the
advantages of the single-clock system turn out to be mostly chimerical. The advantages
include: easy design to avoid bus fights, clean write cycles with solid data and address
hold times, flexibility to have memory output enable access times greater than ½ of the
bus cycle, and the ability to use an asymmetric clock generated by a clock doubler. The
supposed advantage that single-clock systems have of double-speed bus operation is
not possible with real-world memories unless the memory is backed with fast-cache
RAM.
has many advantages compared to a single-clock design, and on closer examination the
advantages of the single-clock system turn out to be mostly chimerical. The advantages
include: easy design to avoid bus fights, clean write cycles with solid data and address
hold times, flexibility to have memory output enable access times greater than ½ of the
bus cycle, and the ability to use an asymmetric clock generated by a clock doubler. The
supposed advantage that single-clock systems have of double-speed bus operation is
not possible with real-world memories unless the memory is backed with fast-cache
RAM.
•
The Rabbit 3000 operates at 3.6 V or less, but it has 5 V tolerant inputs and has a sec-
ond complete bus for I/O operations that is separate from the memory bus. This second
auxiliary bus can be enabled by the application as a designer option. These features
make it easy to design systems that mix 3 V and 5 V components, and avoid the loading
problems and the EMI problems that result if the memory bus is extended to connect
with many I/O devices.
ond complete bus for I/O operations that is separate from the memory bus. This second
auxiliary bus can be enabled by the application as a designer option. These features
make it easy to design systems that mix 3 V and 5 V components, and avoid the loading
problems and the EMI problems that result if the memory bus is extended to connect
with many I/O devices.
•
The Rabbit may be remotely programmed, including complete cold-boot, via a serial
link, Ethernet, or even via a network or the Internet using built in capabilities and/or the
RabbitLink ethernet network accessory device. These capabilities proven and inexpen-
sive to implement.
link, Ethernet, or even via a network or the Internet using built in capabilities and/or the
RabbitLink ethernet network accessory device. These capabilities proven and inexpen-
sive to implement.
•
The Rabbit 3000 on-chip peripheral complement is huge compared to competitive pro-
cessors.
cessors.