Jameco Electronics 3000 ユーザーズマニュアル
12
Rabbit 3000 Microprocessor
important for RS-485 communication because a half duplex line driver cannot have the
direction of transmission reversed until the last data bit has been sent. In many UARTs,
including those on the Z180, it is difficult to generate an interrupt after the last bit is sent.
A so called address bit can be transmitted as either high or low after the last data bit. The
address bit, if used, is followed by a high stop bit. This facility can be used to transmit 2
stop bits or a parity bit if desired. The ability to directly transmit a high voltage level
address bit was not included in the original revision of the Rabbit 2000 processor.
direction of transmission reversed until the last data bit has been sent. In many UARTs,
including those on the Z180, it is difficult to generate an interrupt after the last bit is sent.
A so called address bit can be transmitted as either high or low after the last data bit. The
address bit, if used, is followed by a high stop bit. This facility can be used to transmit 2
stop bits or a parity bit if desired. The ability to directly transmit a high voltage level
address bit was not included in the original revision of the Rabbit 2000 processor.
Serial ports A, B, C and D can be operated in the clocked serial mode. In this mode, a
clock line synchronously clocks the data in or out. Either the Rabbit serial port or the
remote device can supply the clock. When the Rabbit provides the clock, the baud rate can
be up to 1/2 of the system clock frequency. When the clock is provided by another device
the maximum data rate is system clock divided by 6 due to the need to synchronize the
externally supplied clock with the internal clock. The clocked serial mode may be used to
support “SPI” bus devices.
clock line synchronously clocks the data in or out. Either the Rabbit serial port or the
remote device can supply the clock. When the Rabbit provides the clock, the baud rate can
be up to 1/2 of the system clock frequency. When the clock is provided by another device
the maximum data rate is system clock divided by 6 due to the need to synchronize the
externally supplied clock with the internal clock. The clocked serial mode may be used to
support “SPI” bus devices.
Serial Port A has special features. It can be used to cold-boot the system after reset. Serial
Port A is the normal port that is used for software development under Dynamic C.
Port A is the normal port that is used for software development under Dynamic C.
All the serial ports have a special timing mode that supports infrared data communications
standards.
standards.
2.2.3 System Clock
The main oscillator uses an external crystal with a frequency typically in the range from
1.8 MHz to 26 MHz. The processor clock is derived from the oscillator output by either
doubling the frequency, using the frequency directly, or dividing the frequency by 2, 4, 6
or by 8. The processor clock can also be driven by the 32.768 kHz real-time clock oscilla-
tor for very low power operation, in which case the main oscillator can be shut down
under software control.
1.8 MHz to 26 MHz. The processor clock is derived from the oscillator output by either
doubling the frequency, using the frequency directly, or dividing the frequency by 2, 4, 6
or by 8. The processor clock can also be driven by the 32.768 kHz real-time clock oscilla-
tor for very low power operation, in which case the main oscillator can be shut down
under software control.
2.2.4 32.768 kHz Oscillator Input
The 32.768 kHz oscillator input is designed to accept a 32.768 kHz clock. A suggested low-
power clock circuit using “tiny logic” parts is documented and low in cost. The 32.768 kHz
clock is used to drive a battery-backable (there is a separate power pin) internal 48-bit
counter that serves as a real-time clock (RTC). The counter can be set and read by software
and is intended for keeping the date and time. There are enough bits to keep the date for
more than 100 years. The 32.768 kHz oscillator input is also used to drive the watchdog
timer and to generate the baud clock for Serial Port A during the cold-boot sequence.
power clock circuit using “tiny logic” parts is documented and low in cost. The 32.768 kHz
clock is used to drive a battery-backable (there is a separate power pin) internal 48-bit
counter that serves as a real-time clock (RTC). The counter can be set and read by software
and is intended for keeping the date and time. There are enough bits to keep the date for
more than 100 years. The 32.768 kHz oscillator input is also used to drive the watchdog
timer and to generate the baud clock for Serial Port A during the cold-boot sequence.