Jameco Electronics 3000 ユーザーズマニュアル
228
Rabbit 3000 Microprocessor
Example
The spreader and doubler are enabled, with 8 ns nominal delay in the doubler. The high
and low clock are equal to within 1 ns. This violates the duty cycle requirement by 3 ns
since (clock low - clock high) can be as small as -1 ns, but the requirement is that it not be
less than 2 ns. Thus, 3 ns must be added to the minimum period of 21 ns, giving a mini-
mum period of 24 ns, and a maximum frequency of 41.6 MHz (commercial).
and low clock are equal to within 1 ns. This violates the duty cycle requirement by 3 ns
since (clock low - clock high) can be as small as -1 ns, but the requirement is that it not be
less than 2 ns. Thus, 3 ns must be added to the minimum period of 21 ns, giving a mini-
mum period of 24 ns, and a maximum frequency of 41.6 MHz (commercial).
Since the built-in high-speed oscillator buffer generates a clock that is very close to having
a 50% duty cycle, to obtain the highest clock speeds using the clock doubler you must use
an external oscillator buffer that will allow for duty-cycle adjustment by changing the
resistance of the power and ground connections as shown below.
a 50% duty cycle, to obtain the highest clock speeds using the clock doubler you must use
an external oscillator buffer that will allow for duty-cycle adjustment by changing the
resistance of the power and ground connections as shown below.
Figure 16-8. External Oscillator Buffer
+3.3 V
Adjust the values of
these resistors to
vary the duty cycle
XTALA1