Jameco Electronics 3000 ユーザーズマニュアル
User’s Manual
229
16.5 Power and Current Consumption
With the Rabbit 3000 it is possible to design systems that perform their task with very low
power consumption. Unlike competitive processors, the Rabbit 3000 has short chip select
features designed to minimize power consumption by external memories, which can easily
become the dominant power consumers at low clock frequencies if not well handled.
power consumption. Unlike competitive processors, the Rabbit 3000 has short chip select
features designed to minimize power consumption by external memories, which can easily
become the dominant power consumers at low clock frequencies if not well handled.
The preferred configuration for a Rabbit-based system is to use an external crystal or reso-
nator that has a frequency ½ of the maximum internal clock frequency. The oscillator fre-
quency can be doubled or divided by 2, 4, 6, or 8, giving a variety of operating speeds
from the same crystal frequency. In addition, the 32.768 kHz oscillator the drives the bat-
tery-backable clock can be used as the main processor clock and, to save the substantial
power consumed by the fast oscillator, the fast oscillator can be turned off. This scenario
is called the sleepy mode with a clock speed in the range of 2 kHz to 32 kHz, and with an
operating system current consumption in the range of 10 to 120 µA depending on fre-
quency and voltage.
nator that has a frequency ½ of the maximum internal clock frequency. The oscillator fre-
quency can be doubled or divided by 2, 4, 6, or 8, giving a variety of operating speeds
from the same crystal frequency. In addition, the 32.768 kHz oscillator the drives the bat-
tery-backable clock can be used as the main processor clock and, to save the substantial
power consumed by the fast oscillator, the fast oscillator can be turned off. This scenario
is called the sleepy mode with a clock speed in the range of 2 kHz to 32 kHz, and with an
operating system current consumption in the range of 10 to 120 µA depending on fre-
quency and voltage.
Up to an operating speed of 29.5 MHz, a SST39LF512020 256K × 8, 45 ns access time
flash memory combined with any of several 55 ns low-power SRAMs is assumed for cal-
culating the current consumption estimates below.
flash memory combined with any of several 55 ns low-power SRAMs is assumed for cal-
culating the current consumption estimates below.
A crystal frequency of 3.6864 MHz is a good choice for a low-power system consuming
between 2 and 18 mA at 3.3 V as the clock frequency is throttled between 0.46 MHz and
7.37 MHz. The required memory access time is about 250 ns, however, a faster memory
may result in less power since a short chip select cycle can then be used.
between 2 and 18 mA at 3.3 V as the clock frequency is throttled between 0.46 MHz and
7.37 MHz. The required memory access time is about 250 ns, however, a faster memory
may result in less power since a short chip select cycle can then be used.
A crystal frequency of 11.0592 MHz is a good choice for a medium-power system con-
suming between 5 and 50 mA at 3.3 V as the clock frequency is throttled between 1.4 MHz
and 22 MHz. The required memory access time is 70 ns.
suming between 5 and 50 mA at 3.3 V as the clock frequency is throttled between 1.4 MHz
and 22 MHz. The required memory access time is 70 ns.
A crystal frequency of 14.7456 MHz is a good choice for a faster medium-power system
consuming between 6 and 65 mA at 3.3 V as the clock frequency is throttled between 1.8
and 29.5 MHz. The required memory access time is 55 ns.
consuming between 6 and 65 mA at 3.3 V as the clock frequency is throttled between 1.8
and 29.5 MHz. The required memory access time is 55 ns.
A maximum-speed system that will require fast RAM for program and data can be con-
structed using a 25.8048 MHz crystal. This system will consume between 12 and 112 mA
at 3.3V as the clock speed is throttled between 3 and 51.6 MHz. The required memory
access time is about 20 ns.
structed using a 25.8048 MHz crystal. This system will consume between 12 and 112 mA
at 3.3V as the clock speed is throttled between 3 and 51.6 MHz. The required memory
access time is about 20 ns.
Typical system current consumptions are shown in the graphs below. These are for the
processor and oscillator only, and do not include current consumed by memory and other
devices. It is assumed that approximately 30 pF is connected to each address line, particu-
larly A0 and A1, which account for three quarters of the charging current due to the
address lines.
processor and oscillator only, and do not include current consumed by memory and other
devices. It is assumed that approximately 30 pF is connected to each address line, particu-
larly A0 and A1, which account for three quarters of the charging current due to the
address lines.