Jameco Electronics 3000 ユーザーズマニュアル

Input/output instructions are now accomplished by normal memory access instructions 
prefixed by an op code byte to indicate access to an I/O space. There are two I/O 
spaces, internal peripherals and external I/O devices.

Some Z80 and Z180 instructions have been deleted and are not supported by the Rabbit 
(see Chapter 20, “Differences Rabbit vs. Z80/Z180 Instructions”). Most of the deleted 
instructions are obsolete or are little-used instructions that can be emulated by several 
Rabbit instructions. It was necessary to remove some instructions to free up 1-byte op 
codes needed to implement new instructions efficiently. The instructions were not re-
implemented as 2-byte op codes so as not to waste on-chip resources on unimportant 
instructions. Except for the instruction 

, the original Z180 binary encoding 

of op codes is retained for all Z180 instructions that are retained.

A constant that follows the op code in the instruction stream can generally be loaded to 
any register, except PC, IP, and F. (Load to the PC is a jump instruction.) This includes the 
alternate registers on the Rabbit, but not on the Z180. Some example instructions appear 
below.

Byte loads require four clocks, word loads require six clocks. Loads to IX, IY or the alter-
nate registers generally require two extra clocks because the op code has a 1-byte prefix.

Similar 16-bit loads and stores exist for DE, BC, SP, IX and IY.

It is possible to load data to the alternate registers, but it is not possible to store the data in 
the alternate register directly to memory.