Jameco Electronics 3000 ユーザーズマニュアル

Rabbit 3000 Microprocessor

3.3.3 Load or Store Data Using an Index Register

An index register is a 16-bit register, usually IX, IY, SP or HL, that is used for the address
of a byte or word to be fetched from or stored to memory. Sometimes an 8-bit offset is
added to the address either as a signed or unsigned number. The 8-bit offset is a byte in the
instruction word. BC and DE can serve as index registers only for the special cases below.

LD A,(BC)

LD A’,(BC)

LD (BC),A

LD A,(DE)

LD A’,(DE)

LD (DE),A

Other 8-bit loads and stores are the following.

LD r,(HL) ; r is any of 7 registers A, B, C, D, E, H, L

LD r’,(HL) ; same but alternate register destination

LD (HL),r ; r is any of the 7 registers above

;or an immediate data byte

** LD (HL),r’ ;**** not a legal instruction!

LD r,(IX+d) ; r is any of 7 registers, d is -128 to +127 offset

LD r’,(IX+d) ; same but alternate destination

LD (IX+d),r ; r is any of 7 registers or an immediate data byte

LD (IY+d),r ; IX or IY can have offset d

The following are 16-bit indexed loads and stores. None of these instructions exists on the
Z180 or Z80. The only source for a store is HL. The only destination for a load is HL or HL'.

LD HL,(SP+d) ; d is an offset from 0 to 255.

; 16-bits are fetched to HL or HL’

LD (SP+d),HL ; corresponding store

LD HL,(HL+d) ; d is an offset from -128 to +127,

; uses original HL value for addressing

; l=(HL+d), h=(HL+d+1)

LD HL’,(HL+d)

LD (HL+d),HL

LD (IX+d),HL ; store HL at address pointed to

; by IX plus -128 to +127 offset

LD HL,(IX+d)

LD HL’,(IX+d)

LD (IY+d),HL ; store HL at address pointed to

; by IY plus -128 to +127 offset

LD HL,(IY+d)

LD HL’,(IY+d)