Jameco Electronics 3000 ユーザーズマニュアル
36
Rabbit 3000 Microprocessor
3.3.6 Push and Pop Instructions
There are instructions to push and pop the 16-bit registers AF, HL, DC, BC, IX, and IY.
The registers AF', HL', DE', and BC' can be popped. Popping the alternate registers is
exclusive to the Rabbit, and is not allowed on the Z80 / Z180.
The registers AF', HL', DE', and BC' can be popped. Popping the alternate registers is
exclusive to the Rabbit, and is not allowed on the Z80 / Z180.
Examples
POP HL
PUSH BC
PUSH IX
PUSH af
POP DE
POP DE’
POP HL’
3.3.7 16-bit Arithmetic and Logical Ops
The HL register is the primary 16-bit accumulator. IX and IY can serve as alternate accu-
mulators for many 16-bit operations. The Z180/Z80 has a weak set of 16-bit operations,
and as a practical matter the programmer has to resort to combinations of 8-bit operations
in order to perform many 16-bit operations. The Rabbit has many new op codes for 16-bit
operations, removing some of this weakness.
mulators for many 16-bit operations. The Z180/Z80 has a weak set of 16-bit operations,
and as a practical matter the programmer has to resort to combinations of 8-bit operations
in order to perform many 16-bit operations. The Rabbit has many new op codes for 16-bit
operations, removing some of this weakness.
The basic Z80/Z180 16-bit arithmetic instructions are
ADD HL,ww ; where ww is HL, DE, BC, SP
ADC HL,ww ; ADD and ADD carry
SBC HL,ww ; sub and sub carry
INC ww ; increment the register (without affecting flags)
In the above op codes, IX or IY can be substituted for HL. The
ADD
and
ADC
instructions
can be used to left-shift HL with the carry. An alternate destination prefix (
ALTD
) may be
used on the above instructions. This causes the result and its flags to be stored in the corre-
sponding alternate register. If the
sponding alternate register. If the
ALTD
flag
is used when IX or IY is the destination regis-
ter, then only the flags are stored in the alternate flag register.
The following new instructions have been added for the Rabbit.
;Shifts
RR HL
; rotate HL right with carry, 1 byte, 2 clocks
; note use ADC HL,HL for left rotate, or add HL,HL if
; no carry in is needed.
RR DE
; 1 byte, 2 clocks
RL DE ; rotate DE left with carry, 1-byte, 2 clocks
RR IX ; rotate IX right with carry, 2 bytes, 4 clocks
RR IY ; rotate IY right with carry
;Logical Operations
AND HL,DE ; 1 byte, 2 clocks
AND IX,DE ; 2 bytes, 4 clocks
AND IY,DE
OR HL,DE ; 1 byte, 2 clocks
OR IX,DE ; 2 bytes, 4 clocks
OR IY,DE