Freescale Semiconductor MPC5200B ユーザーズマニュアル
BestComm DMA Registers—MBAR+0x1200
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor
13-11
13.15.10 SDMA Task Control 4 Register—MBAR + 0x1224
SDMA Task Control 5 Register—MBAR + 0x1226
13.15.11 SDMA Task Control 6 Register—MBAR + 0x1228
SDMA Task Control 7 Register—MBAR + 0x122A
Table 13-10. SDMA Task Control 4 Register
SDMA Task Control 5 Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
TCR4
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
TCR5
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:15
TCR4
Task control register for task 4. Same bit layout as for TCR0
16:31
TCR5
Task control register for task 5. Same bit layout as for TCR0
Table 13-11. SDMA Task Control 6 Register
SDMA Task Control 7 Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
TCR6
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
TCR7
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:15
TCR6
Task control register for task 6. Same bit layout as for TCR0
16:31
TCR7
Task control register for task 7. Same bit layout as for TCR0