Freescale Semiconductor MPC5200B ユーザーズマニュアル
BestComm DMA Registers—MBAR+0x1200
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor
13-13
13.15.14 SDMA Task Control C Register—MBAR + 0x1234
SDMA Task Control D Register—MBAR + 0x1236
13.15.15 SDMA Task Control E Register—MBAR + 0x1238
SDMA Task Control F Register—MBAR + 0x123C
Table 13-14. SDMA Task Control C Register
SDMA Task Control D Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
TCRC
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
TCRD
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:15
TCRC
Task control register for task 12. Same bit layout as for TCR0
16:31
TCRD
Task control register for task 13. Same bit layout as for TCR0
Table 13-15. SDMA Task Control E Register
SDMA Task Control F Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
TCRE
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
TCRF
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:15
TCRE
Task control register for task 14. Same bit layout as for TCR0
16:31
TCRF
Task control register for task 15. Same bit layout as for TCR0