Freescale Semiconductor MPC5200B ユーザーズマニュアル
MPC5200B Users Guide, Rev. 1
13-12
Freescale Semiconductor
BestComm DMA Registers—MBAR+0x1200
13.15.12 SDMA Task Control 8 Register—MBAR + 0x122C
SDMA Task Control 9 Register—MBAR + 0x122E
13.15.13 SDMA Task Control A Register—MBAR + 0x1230
SDMA Task Control B Register—MBAR + 0x1232
Table 13-12. SDMA Task Control 8 Register
SDMA Task Control 9 Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
TCR8
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
TCR9
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:15
TCR8
Task control register for task 8. Same bit layout as for TCR0
16:31
TCR9
Task control register for task 9. Same bit layout as for TCR0
Table 13-13. SDMA Task Control A Register
SDMA Task Control B Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
TCRA
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
TCRB
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
Description
0:15
TCRA
Task control register for task 10. Same bit layout as for TCR0
16:31
TCRB
Task control register for task 11. Same bit layout as for TCR0