Intel SR1640TH SR1640THNA ユーザーズマニュアル
製品コード
SR1640THNA
Functional Architecture
Intel® Server System SR1640TH TPS
Revision
1.0
Intel order number: E94847-001
14
This table defines half of the valid memory configurations. You can exchange Channel A
DIMMs with the DIMMs on Channel B to get another half.
DIMMs with the DIMMs on Channel B to get another half.
2.4.3.4.5
UDIMM Configuration rules
Table 5. UDIMM memory configuration rule
DIMM slots per
channel
DIMMs populated per
channel
Speed
Ranks per channel
2
1
1066, 1333
Single Rank, Dual Rank
2
2
1066, 1333
Single Rank, Dual Rank
To get the maximum memory size on UDIMM, you get the detail information from below
table.
table.
Table 6. UDIMM Maximum configuration
Max Memory Possible
1Gb DRAM Technology
2Gb DRAM Technology
Single Rank UDIMM
4GB
(4x 1GB DIMMs)
(4x 1GB DIMMs)
8GB
(4x 2GB DIMMs)
(4x 2GB DIMMs)
Dual Rank UDIMMs
8GB
(4x 2GB DIMMs)
(4x 2GB DIMMs)
16GB
(4x 4GB DIMMs)
(4x 4GB DIMMs)
Server boards in Intel
®
Server System SR1640TH have the following limitations on UDIMM.
Not support 800MHz ECC UDIMMs
No support for LV DIMMs
256Mb technology, x4 DRAM on UDIMM and quad rank UDIMM are NOT supported
x16 DRAM is not supported on combo routing
All channels in a system will run at the fastest common frequency
No mixing of registered and unbuffered DIMMs
Non-ECC UDIMMs not supported
Mixing ECC and non-ECC UDIMMs anywhere on the platform will prevent the system
to boot/function correctly
to boot/function correctly
2.4.3.4.6
RDIMM Configuration rules
Table 7. RDIMM memory configuration rule
DIMM slots per channel DIMMs populated per channel
Speed
Ranks per channel
2
1
1066, 1333 Single Rank, Dual Rank
2 1
1066
Quad
Rank
2
2
1066, 1333 Single Rank, Dual Rank
2 2
800*
Quad
Rank