Intel SR1640TH SR1640THNA ユーザーズマニュアル
製品コード
SR1640THNA
Functional Architecture
Intel® Server System SR1640TH TPS
Revision
1.0
Intel order number: E94847-001
12
feature offered by the Intel
®
S3420 I/O Hub and a variably-sized Memory Mapped I/O region
for the PCI Express* functions.
2.4.3.3.2
High-Memory Reclaim
When 4 GB or more of physical memory is installed (physical memory is the memory
installed as DDR3 DIMMs), the reserved memory is lost. However, the Intel
installed as DDR3 DIMMs), the reserved memory is lost. However, the Intel
®
3420 chipset
provides a feature called high-memory reclaim, which allows the BIOS and operating system
to remap the lost physical memory into system memory above 4 GB (the system memory is
the memory the processor can see).
to remap the lost physical memory into system memory above 4 GB (the system memory is
the memory the processor can see).
The BIOS always enables high-memory reclaim if it discovers installed physical memory
equal to or greater than 4 GB. For the operating system, the reclaimed memory is
recoverable only if the PAE feature in the processor is supported and enabled. Most
operating systems support this feature. For details, see the relevant operating system
manuals.
equal to or greater than 4 GB. For the operating system, the reclaimed memory is
recoverable only if the PAE feature in the processor is supported and enabled. Most
operating systems support this feature. For details, see the relevant operating system
manuals.
2.4.3.3.3
ECC Support
Only ECC memory is supported on server board S3420TH.
2.4.3.4
Memory Map and Population Rules
The following nomenclature is followed for DIMM sockets:
Table 3. Standard Platform DIMM Nomenclature
Channel A
Channel B
A1 A2
B1 B2
2.4.3.4.1
TableMemory Subsystem Operating Frequency Determination
The rules for determining the operating frequency of the memory channels are simple, but
not necessarily straightforward. There are several limiting factors, including the number of
DIMMs on a channel and organization of the DIMM - that is, either single-rank (SR), dual-
rank (DR), or quad-rank (QR):
not necessarily straightforward. There are several limiting factors, including the number of
DIMMs on a channel and organization of the DIMM - that is, either single-rank (SR), dual-
rank (DR), or quad-rank (QR):
The speed of the processor’s IMC is the maximum speed possible.
The speed of the slowest component – the slowest DIMM or the IMC – determines
the maximum frequency, subject to further limitations.
the maximum frequency, subject to further limitations.
A single 1333-MHz DIMM (SR or DR) on a channel may run at full 1333-MHz speed.
If two SR/DR DIMMs are installed on a channel, the speed is limited to 1066 MHZ.
A single QR RDIMM on a channel is limited to 1066 MHz.
Two QR RDIMMs or a mix of QR + SR/DR on a channel is limited to 800 MHz.
2.4.3.4.2
Memory Subsystem Nomenclature
1. DIMMs are organized into physical slots on DDR3 memory channels that belong
to processor sockets.
2. The memory channels are identified as channels A, B.
3. For Intel
3. For Intel
®
Xeon
®
3400 Series, each socket can support a maximum of four DIMM
sockets (two DIMM sockets per channel), which can support a maximum of four
DIMM sockets.
DIMM sockets.
4. The Intel
®
Xeon
®
3400 Series processor on the Server Board of Intel
®
Server
System SR1640TH is populated on the processor socket. It has an Integrated
Memory Controller (IMC). The IMC provides two DDR3 channels and groups
DIMMs on the board into an autonomous memory.
Memory Controller (IMC). The IMC provides two DDR3 channels and groups
DIMMs on the board into an autonomous memory.