Microchip Technology ARD00330 データシート
2010 Microchip Technology Inc.
Preliminary
DS39979A-page 53
PIC18F87J72 FAMILY
SPBRGH1
PIC18F8XJ72
0000 0000
0000 0000
uuuu uuuu
BAUDCON1
PIC18F8XJ72
0100 0-00
0100 0-00
uuuu u-uu
LCDDATA22
PIC18F8XJ72
---- ---x
---- ---u
---- ---u
LCDDATA22
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA21
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA20
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA19
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA18
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA16
PIC18F8XJ72
---- ---x
---- ---u
---- ---u
LCDDATA16
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA15
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA14
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA13
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA12
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA10
PIC18F8XJ72
---- ---x
---- ---u
---- ---u
LCDDATA10
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA9
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA8
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA7
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
LCDDATA6
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR1H
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR1L
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP1CON
PIC18F8XJ72
--00 0000
--00 0000
--uu uuuu
CCPR2H
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR2L
PIC18F8XJ72
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP2CON
PIC18F8XJ72
--00 0000
--00 0000
--uu uuuu
TABLE 5-2:
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable
Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
4: See Table 5-1 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read as ‘0’.