Microchip Technology ARD00330 データシート
2010 Microchip Technology Inc.
Preliminary
DS39979A-page 55
PIC18F87J72 FAMILY
6.0
MEMORY ORGANIZATION
There are two types of memory in PIC18 Flash
microcontroller devices:
• Program Memory
• Data RAM
As Harvard architecture devices, the data and program
memories use separate busses; this allows for
concurrent access of the two memory spaces.
Additional detailed information on the operation of the
Flash program memory is provided in Section 7.0
“Flash Program Memory”.
microcontroller devices:
• Program Memory
• Data RAM
As Harvard architecture devices, the data and program
memories use separate busses; this allows for
concurrent access of the two memory spaces.
Additional detailed information on the operation of the
Flash program memory is provided in Section 7.0
“Flash Program Memory”.
6.1
Program Memory Organization
PIC18 microcontrollers implement a 21-bit program
counter which is capable of addressing a 2-Mbyte
program memory space. Accessing a location between
the upper boundary of the physically implemented
memory and the 2-Mbyte address will return all ‘0’s (a
NOP instruction).
The PIC18F87J72 family has a Flash program memory
size of 128 Kbytes (65,536 single-word instructions).
The program memory maps for individual family
members are shown in Figure 6-1.
counter which is capable of addressing a 2-Mbyte
program memory space. Accessing a location between
the upper boundary of the physically implemented
memory and the 2-Mbyte address will return all ‘0’s (a
NOP instruction).
The PIC18F87J72 family has a Flash program memory
size of 128 Kbytes (65,536 single-word instructions).
The program memory maps for individual family
members are shown in Figure 6-1.
FIGURE 6-1:
MEMORY MAPS FOR PIC18F87J72 FAMILY DEVICES
Note:
Sizes of memory areas are not to scale. Sizes of program memory areas are enhanced to show detail.
Unimplemented
Read as ‘0’
Unimplemented
Read as ‘0’
000000h
1FFFFFh
01FFFFh
00FFFFh
PC<20:0>
Stack Level 1
Stack Level 31
CALL, CALLW, RCALL,
RETURN, RETFIE, RETLW,
21
User Mem
o
ry S
pac
e
On-Chip
Memory
ADDULNK, SUBULNK
Config. Words
Config. Words
PIC18F86J72
PIC18F87J72
On-Chip
Memory