Microchip Technology MA240029 データシート
2010-2011 Microchip Technology Inc.
DS39996F-page 259
PIC24FJ128GA310 FAMILY
REGISTER 20-5:
PMCSxCF: CHIP SELECT x CONFIGURATION REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
CSDIS
CSP
CSPTEN
BEP
—
WRSP
RDSP
SM
bit 15
bit 8
R/W-0
R/W-0
R/W-0
U-0
U-0
U-0
U-0
U-0
ACKP
PTSZ1
PTSZ0
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
CSDIS:
Chip Select x Disable bit
1
= Disable the Chip Select x functionality
0
= Enable the Chip Select x functionality
bit 14
CSP:
Chip Select x Polarity bit
1
= Active-high (PMCSx)
0
= Active-low (PMCSx)
bit 13
CSPTEN:
PMCSx Port Enable bit
1
= PMCSx port is enabled
0
= PMCSx port is disabled
bit 12
BEP:
Chip Select x Nibble/Byte Enable Polarity bit
1
= Nibble/Byte enable is active-high (PMBE0, PMBE1)
0
= Nibble/Byte enable is active-low (PMBE0, PMBE1)
bit 11
Unimplemented:
Read as ‘0’
bit 10
WRSP:
Chip Select x Write Strobe Polarity bit
For Slave modes and Master mode when SM = 0:
1
1
= Write strobe is active-high (PMWR)
0
= Write strobe is active-low (PMWR)
For Master mode when SM = 1:
1
1
= Enable strobe is active-high (PMENB)
0
= Enable strobe is active-low (PMENB)
bit 9
RDSP:
Chip Select x Read Strobe Polarity bit
For Slave modes and Master mode when SM = 0:
1
1
= Read strobe is active-high (PMRD)
0
= Read strobe is active-low (PMRD)
For Master mode when SM = 1:
1
1
= Read/write strobe is active-high (PMRD/PMWR)
0
= Read/Write strobe is active-low (PMRD/PMWR)
bit 8
SM:
Chip Select x Strobe Mode bit
1
= Read/write and enable strobes (PMRD/PMWR and PMENB)
0
= Read and write strobes (PMRD and PMWR)
bit 7
ACKP:
Chip Select x Acknowledge Polarity bit
1
= ACK is active-high (PMACK1)
0
= ACK is active-low (PMACK1)
bit 6-5
PTSZ<1:0>:
Chip Select x Port Size bits
11
= Reserved
10
= 16-bit port size (PMD<15:0>)
01
= 4-bit port size (PMD<3:0>)
00
= 8-bit port size (PMD<7:0>)
bit 4-0
Unimplemented:
Read as ‘0’