Microchip Technology MA240029 データシート
2010-2011 Microchip Technology Inc.
DS39996F-page 257
PIC24FJ128GA310 FAMILY
REGISTER 20-3:
PMCON3: EPMP CONTROL REGISTER 3
R/W-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
PTWREN
PTRDEN
PTBE1EN
PTBE0EN
—
AWAITM1
AWAITM0
AWAITE
bit 15
bit 8
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
PTEN22
(
)
PTEN21
(
)
PTEN20
(
)
PTEN19
PTEN18
PTEN17
(
PTEN16
(
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
PTWREN:
Write/Enable Strobe Port Enable bit
1
= PMWR/PMENB port is enabled
0
= PMWR/PMENB port is disabled
bit 14
PTRDEN:
Read/Write Strobe Port Enable bit
1
= PMRD/PMWR port is enabled
0
= PMRD/PMWR port is disabled
bit 13
PTBE1EN:
High Nibble/Byte Enable Port Enable bit
1
= PMBE1 port is enabled
0
= PMBE1 port is disabled
bit 12
PTBE0EN:
Low Nibble/Byte Enable Port Enable bit
1
= PMBE0 port is enabled
0
= PMBE0 port is disabled
bit 11
Unimplemented:
Read as ‘0’
bit 10-9
AWAITM<1:0>:
Address Latch Strobe Wait States bits
11
= Wait of 3½ T
CY
10
= Wait of 2½ T
CY
01
= Wait of 1½ T
CY
00
= Wait of ½ T
CY
bit bit 8
AWAITE:
Address Hold After Address Latch Strobe Wait States bits
1
= Wait of 1¼ T
CY
0
= Wait of ¼ T
CY
bit 7
Unimplemented:
Read as ‘0’
bit 6-0
PTEN<22:16>:
EPMP Address Port Enable bits
1
= PMA<22:16> function as EPMP address lines
0
= PMA<22:16> function as port I/Os
Note 1:
These bits are not available in 80 and 64-pin devices (PIC24FJXXXGA306, PIC24FJXXXGA308).