Microchip Technology MA240029 データシート

 2010-2011 Microchip Technology Inc.

DS39996F-page 303

PIC24FJ128GA310 FAMILY

bit 1

BUFM:

Buffer Fill Mode Select bit

(

)

= A/D buffer is two, 13-word buffers, starting at ADC1BUF0 and ADC1BUF12, and sequential

conversions fill the buffers alternately (Split mode)

= A/D buffer is a single, 26-word buffer and fills sequentially from ADC1BUF0 (FIFO mode)

bit 0

ALTS:

Alternate Input Sample Mode Select bit

= Uses channel input selects for Sample A on first sample and Sample B on next sample

= Always uses channel input selects for Sample A

REGISTER 24-2:

AD1CON2: A/D CONTROL REGISTER 2 (CONTINUED)

Note 1:

These bits are only applicable when the buffer is used in FIFO mode (BUFREGEN = 0). In addition, BUFS
is only used when BUFM = 1.

REGISTER 24-3:

AD1CON3: A/D CONTROL REGISTER 3

R/W-0

R-0

R/W-0

ADRC

EXTSAM

PUMPEN

SAMC4

SAMC3

SAMC2

SAMC1

SAMC0

bit 15

bit 8

R/W-0

ADCS7

ADCS6

ADCS5

ADCS4

ADCS3

ADCS2

ADCS1

ADCS0

bit 7

bit 0

Legend:
R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

ADRC:

A/D Conversion Clock Source bit

= RC Clock

= Clock derived from system clock

bit 14

EXTSAM:

Extended Sampling Time bit

= A/D is still sampling after SAMP = 0

= A/D is finished sampling

bit 13

PUMPEN:

Charge Pump Enable bit

= Charge pump for switches is enabled

= Charge pump for switches is disabled

bit 12-8

SAMC<4:0>:

Auto-Sample Time Select bits

11111

= 31 T


00001

= 1 T

00000

= 0 T

bit 7-0

ADCS<7:0>:

A/D Conversion Clock Select bits

11111111


= Reserved

01000000

00111111

= 64·T

= T


00000001

= 2·T

= T

00000000

= T