Microchip Technology MA240029 データシート
PIC24FJ128GA310 FAMILY
DS39996F-page 70
2010-2011 Microchip Technology Inc.
FIGURE 4-8:
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
0
Program Counter
23 Bits
1
DSRPAG<7:0>
8 Bits
EA
15 Bits
Program Counter
Select
TBLPAG
8 Bits
EA
16 Bits
Byte Select
0
0
1
/0
User/Configuration
Table Operations
(2)
Program Space Visibility
(1)
Space Select
24 Bits
23 Bits
(Remapping)
1
/0
1
/0
Note 1:
DSRPAG<8> acts as word select. DSRPAG<9> should always be ‘1’ to map program memory to data memory.
2:
The instructions, TBLRDH/TBLWTH/TBLRDL/TBLWTL, decide if the higher or lower word of program memory is
accessed. TBLRDH/TBLWTH instructions access the higher word and TBLRDL/TBLWTL instructions access the
lower word. Table read operations are permitted in the configuration memory space.
accessed. TBLRDH/TBLWTH instructions access the higher word and TBLRDL/TBLWTL instructions access the
lower word. Table read operations are permitted in the configuration memory space.
1-Bit