Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD データシート

32072H–AVR32–10/2012

Figure 15-9. READMODE = 1: Data Is Sampled by SMC Before the Rising Edge of NRD

 shows the typical read cycle of an LCD module. The read data is valid

t

PACC 

after the falling edge of the NCS signal and remains valid until the rising edge of NCS. Data

must be sampled when NCS is raised. In that case, the MODE.READMODE bit must be written
to zero (read is controlled by NCS): the SMC internally samples the data on the rising edge of
CML_SMC that generates the rising edge of NCS, whatever the programmed waveform of NRD
may be.

CLK_SMC

A[AD_MSB:2]

NBS0, NBS1, 

A0, A1

NRD

NCS

D[15:0]

t

PACC

Data Sampling