Texas Instruments Delfino C28346 DIM168 ControlCARD TMDSCNCD28346-168 TMDSCNCD28346-168 데이터 시트
제품 코드
TMDSCNCD28346-168
GPIOxn
SYSCLK
t
w(GPI)
SPRS516D – MARCH 2009 – REVISED AUGUST 2012
6.10.3 Sampling Window Width for Input Signals
The following section summarizes the sampling window width for input signals for various input qualifier
configurations.
configurations.
Sampling frequency denotes how often a signal is sampled with respect to SYSCLKOUT.
Sampling frequency = SYSCLKOUT/(2 * QUALPRD), if QUALPRD
≠
0
Sampling frequency = SYSCLKOUT, if QUALPRD = 0
Sampling period = SYSCLKOUT cycle x 2 x QUALPRD, if QUALPRD
≠
0
In the above equations, SYSCLKOUT cycle indicates the time period of SYSCLKOUT.
Sampling period = SYSCLKOUT cycle, if QUALPRD = 0
In a given sampling window, either 3 or 6 samples of the input signal are taken to determine the validity of
the signal. This is determined by the value written to GPxQSELn register.
the signal. This is determined by the value written to GPxQSELn register.
Case 1:
Qualification using 3 samples
Sampling window width = (SYSCLKOUT cycle x 2 x QUALPRD) x 2, if QUALPRD
≠
0
Sampling window width = (SYSCLKOUT cycle) x 2, if QUALPRD = 0
Case 2:
Qualification using 6 samples
Sampling window width = (SYSCLKOUT cycle x 2 x QUALPRD) x 5, if QUALPRD
≠
0
Sampling window width = (SYSCLKOUT cycle) x 5, if QUALPRD = 0
Figure 6-10. General-Purpose Input Timing
124
Electrical Specifications
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