Texas Instruments Delfino C28346 DIM168 ControlCARD TMDSCNCD28346-168 TMDSCNCD28346-168 데이터 시트
제품 코드
TMDSCNCD28346-168
WAKE INT
(A)
XCLKOUT
Address/Data
(internal)
t
d(WAKE−IDLE)
t
w(WAKE−INT)
SPRS516D – MARCH 2009 – REVISED AUGUST 2012
6.10.4 Low-Power Mode Wakeup Timing
The wakeup signal fed to a GPIO pin to wake up the device must meet the minimum pulse width
requirement. Furthermore, this signal must be free of glitches. If a noisy signal is fed to a GPIO pin, the
wakeup behavior of the device will not be deterministic and the device may not exit low-power mode for
subsequent wakeup pulses.
requirement. Furthermore, this signal must be free of glitches. If a noisy signal is fed to a GPIO pin, the
wakeup behavior of the device will not be deterministic and the device may not exit low-power mode for
subsequent wakeup pulses.
shows the timing requirements,
shows the switching characteristics, and
shows the timing diagram for IDLE mode.
Table 6-13. IDLE Mode Timing Requirements
(1)
MIN
NOM
MAX
UNIT
Without input qualifier
2t
c(SCO)
Pulse duration, external wake-up
t
w(WAKE-INT)
cycles
signal
With input qualifier
5t
c(SCO)
+ t
w(IQSW)
(1)
For an explanation of the input qualifier parameters, see
Table 6-14. IDLE Mode Switching Characteristics
(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Delay time, external wake signal to
program execution resume
program execution resume
(2)
t
d(WAKE-IDLE)
Without input qualifier
20t
c(SCO)
cycles
•
Wake-up from SARAM
With input qualifier
20t
c(SCO)
+ t
w(IQSW)
(1)
For an explanation of the input qualifier parameters, see
(2)
This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. execution of an ISR (triggered
by the wake up) signal involves additional latency.
by the wake up) signal involves additional latency.
A.
WAKE INT can be any enabled interrupt, WDINT, XNMI, or XRS.
Figure 6-11. IDLE Entry and Exit Timing
Copyright © 2009–2012, Texas Instruments Incorporated
Electrical Specifications
125
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