Texas Instruments Evaluation Board for the LM25066I LM25066I-EVM/NOPB LM25066I-EVM/NOPB 데이터 시트
제품 코드
LM25066I-EVM/NOPB
SNVS824C – JUNE 2012 – REVISED MARCH 2013
MFR_SPECIFIC_02: MFR_READ_PIN (D2h)
The MFR_ READ_PIN command will report the upper 12 bits of the VIN x IIN product as measured by the 12-bit
ADC. To read data from the MFR_READ_PIN command, use the PMBus™ Read Word protocol. Reading this
register should use the coefficients shown in
ADC. To read data from the MFR_READ_PIN command, use the PMBus™ Read Word protocol. Reading this
register should use the coefficients shown in
. Please see the section on coefficient calculations to
calculate the values to use.
Table 27. MFR_READ_PIN Register
Value
Meaning
Default
0h – 0FFFh
Value for input current x input voltage
0000h
MFR_SPECIFIC_03: MFR_IN_OC_WARN_LIMIT (D3h)
The MFR_IIN_OC_ WARN_LIMIT PMBus™ command sets the input over-current warning threshold. In the event
that the input current rises above the value set in this register, the IIN over-current flags are set in the status
registers and the SMBA is asserted. To access the MFR_IIN_ OC_WARN_LIMIT register, use the PMBus™
Read/Write Word protocol. Reading/writing to this register should use the coefficients shown in
that the input current rises above the value set in this register, the IIN over-current flags are set in the status
registers and the SMBA is asserted. To access the MFR_IIN_ OC_WARN_LIMIT register, use the PMBus™
Read/Write Word protocol. Reading/writing to this register should use the coefficients shown in
Table 28. MFR_IIN_OC_WARN_LIMIT Register
Value
Meaning
Default
0h – 0FFFh
Value for input over-current warn limit
0FFFh
0FFFh
Input over-current warning disabled
n/a
MFR_SPECIFIC_04: MFR_PIN_OP_WARN_LIMIT (D4h)
The MFR_PIN_OP_WARN_LIMIT PMBus™ command sets the input over-power warning threshold. In the event
that the input power rises above the value set in this register, the PIN Over-power flags are set in the status
registers and the SMBA is asserted. To access the MFR_PIN_OP_WARN_LIMIT register, use the PMBus™
Read/Write Word protocol. Reading/writing to this register should use the coefficients shown in
that the input power rises above the value set in this register, the PIN Over-power flags are set in the status
registers and the SMBA is asserted. To access the MFR_PIN_OP_WARN_LIMIT register, use the PMBus™
Read/Write Word protocol. Reading/writing to this register should use the coefficients shown in
Table 29. MFR_PIN_OP_WARN_LIMIT Register
Value
Meaning
Default
0h – 0FFFh
Value for input over-power warn limit
0FFFh
0FFFh
Input over-power warning disabled
n/a
MFR_SPECIFIC_05: READ_PIN_PEAK (D5h)
The READ_PIN_PEAK command will report the maximum input power measured since a Power-On-Reset or the
last CLEAR_PIN_PEAK command. To access the READ_PIN_PEAK command, use the PMBus™ Read Word
protocol. Use the coefficients shown in
last CLEAR_PIN_PEAK command. To access the READ_PIN_PEAK command, use the PMBus™ Read Word
protocol. Use the coefficients shown in
.
Table 30. READ_PIN_PEAK Register
Value
Meaning
Default
0h – 0FFFh
Maximum value for input current x input voltage since reset or last clear
0h
MFR_SPECIFIC_06: CLEAR_PIN_PEAK (D6h)
The CLEAR_PIN_PEAK command will clear the PIN_PEAK register. This command uses the PMBus™ Send
Byte protocol.
Byte protocol.
MFR_SPECIFIC_07: GATE_MASK (D7h)
The GATE_MASK register allows the hardware to prevent fault conditions from switching off the MOSFET. When
the bit is high, the corresponding FAULT has no control over the MOSFET gate. All status registers will still be
updated (STATUS, DIAGNOSTIC) and an SMBA will still be issued. This register is accessed with the PMBus™
Read / Write Byte protocol.
the bit is high, the corresponding FAULT has no control over the MOSFET gate. All status registers will still be
updated (STATUS, DIAGNOSTIC) and an SMBA will still be issued. This register is accessed with the PMBus™
Read / Write Byte protocol.
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