Texas Instruments 2-A Peak Sink/Source DDR Termination Regulator With VTTREF Buffered Reference TPS51206EVM-745 TPS51206EVM-745 데이터 시트
제품 코드
TPS51206EVM-745
TPS1206EVM
DDR3L VTT Sink and Source
Current Transient
Test condition: 5 Vin, VTT = VTTREF = 0.675 V
IVTTREF = 0 A, IVTT Sink and Source
current 1.35 A
IVTTREF = 0 A, IVTT Sink and Source
current 1.35 A
CH1: VTT
CH2: VTTREF
CH3: Transient Clock
TPS1206EVM
DDR4 VTT Sink and Source
Current Transient
Test condition: 5 Vin, VTT = VTTREF = 0.6 V
IVTTREF = 0 A, IVTT Sink and Source
current 1.2 A
IVTTREF = 0 A, IVTT Sink and Source
current 1.2 A
CH1: VTT
CH2: VTTREF
CH3: Transient Clock
Performance Data and Typical Characteristic Curves
Figure 18. DDR3L (0.75VTT) 1.35-A Sink/Source
Figure 19. DDR4 (0.6VTT) 1.2-A Sink/Source
18
Using the TPS51206EVM-745, 2-A Peak Sink/Source DDR Termination
SLUU515
–
August 2011
Regulator With VTTREF Buffered Reference for DDR2, DDR3, DDR3L, and
Copyright
©
2011, Texas Instruments Incorporated
DDR4