Texas Instruments 2-A Peak Sink/Source DDR Termination Regulator With VTTREF Buffered Reference TPS51206EVM-745 TPS51206EVM-745 데이터 시트
제품 코드
TPS51206EVM-745
EVM Assembly Drawing and PCB Layout
Figure 27. TPS51206EVM-745 Internal Layer 1
Figure 28. TPS51206EVM-745 Internal Layer 2
23
SLUU515
–
August 2011
Using the TPS51206EVM-745, 2-A Peak Sink/Source DDR Termination
Regulator With VTTREF Buffered Reference for DDR2, DDR3, DDR3L, and
Copyright
©
2011, Texas Instruments Incorporated
DDR4