Texas Instruments F28M36 Concerto Control Card TMDSCNCD28M36 TMDSCNCD28M36 데이터 시트
제품 코드
TMDSCNCD28M36
EMUSTOP
T
IM
E
R
(3
(3
)
X
IN
T
(3
(3
)
E
P
W
M
M
(1
2
)
N
M
I
W
D
O
G
E
Q
E
P
(3
(3
)
E
C
A
P
(6
(6
)
M
cB
S
P
I
C
2
S
C
I
S
P
I
PIE (PERIPHERAL INTERRUPT EXPANSION)
C28x
DMA
ANALOG
SUBSYSTEM
G
P
IO
_
M
U
X
1
GPIO_MUX1
C28x NMI
EQEP
ERR
S
O
C
T
R
IG
G
E
R
S
E
O
C
IN
T
E
R
R
U
P
T
S
ADCINT (8:1)
DINTCH (6:1)
TINT 0,1,2
ADCINT (4:1)
GPTRIP
(12:1)
GPTRIP
(12:7)
GPTRIP
(6:4)
PIENMIERR
C28NMIRST
C28 CPU BUS
C28 DMA BUS
C28x
CPU
C28x
FPU
C28x
VCU
PIEINTRS (12:1)
C28x LOCAL MEMORY
TINT1
TINT2
C28NMIINT
C28NMI
BOOT
ROM
L2/L3
RAM
(parity)
SECURE
FLASH
(ECC)
SECURE
L0/L1
RAM
(ECC)
RAMUNCERR
RAMACCVIOL
FLASHUNCERR
S0-S7
SHARED
RAM
(parity)
MTOC
MSG
RAM
RAM
(parity)
IPC
REGS
CTOM
MSG
RAM
RAM
(parity)
MASTER SUBSYSTEM
M0/M1
RAM
(ECC)
C28x NMI
LUF
LVF
FLFSM
FLSINGERR
RAMSINGERR
MTOCIPC (4:1)
SHARED RESOURCES
GPIO_MUX1
XINT 1,2,3
MXINTA, MRINTA
SOCA (9:1), SOCB(9:1)
SOCA (9:1), SOCB(9:1)
TINT 0,1,2
XINT 2
ECCDBLERR
ECCDBLERR
LPMWAKE
M3 NMI
C28x PERIPHERALS
RAMUNCERR
M3 CLOCKS
CLOCKFAIL
LPM WAKEUP
RESETS
EPWM(12:1)TZINT
EPWM(12:1)INT
EQEP(3:1)INT
ECAP(6:1)INT
SPIRXINTA, SPITXINTA
SCIRXINTA, SCITXINTA
GPIO_MUX1
SOCBO
SOCAO
SYNCO
PERIPHERAL
I/O s
FREQ
GASKET
BUS
BRIDGE
EPI
I2CINT1A, I2CINT2A
GPI (63:0)
SPRS825C – OCTOBER 2012 – REVISED FEBRUARY 2014
Figure 3-2. Control Subsystem
28
Device Overview
Copyright © 2012–2014, Texas Instruments Incorporated
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