Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트

The ADCCC register controls the clock source for the ADC module.

ADC Clock Configuration (ADCCC)

ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0xFC8
Type RW, reset 0x0000.0001

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

reserved

RO

RO

RO

RO

RO

RO

RO

RO

RO

RO

RO

RO

RO

RO

RO

RO

Type

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Reset

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

CS

CLKDIV

reserved

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RO

RO

RO

RO

RO

RO

Type

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Reset

Description

Reset

Type

Name

Bit/Field

Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.

0x0000.00

RO

reserved

31:10

PLL VCO Clock Divisor

Description

Value

/1

0x0

/2

0x1

/3

0x2

/(N + 1)

0xN

0x0

RW

CLKDIV

9:4

ADC Clock Source

Description

Value

PLL VCO divided by CLKDIV.

0x0

Alternate clock source as defined by ALTCLKCFG register
in System Control Module.

0x1

MOSC

0x2

Reserved

0x2 - 0xF

0x1

RW

CS

3:0