Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Table 20-5. SSI Register Map (continued)
See
page
Description
Reset
Type
Name
Offset
QSSI Control 1
0x0000.0000
RW
SSICR1
0x004
QSSI Data
0x0000.0000
RW
SSIDR
0x008
QSSI Status
0x0000.0003
RO
SSISR
0x00C
QSSI Clock Prescale
0x0000.0000
RW
SSICPSR
0x010
QSSI Interrupt Mask
0x0000.0000
RW
SSIIM
0x014
QSSI Raw Interrupt Status
0x0000.0008
RO
SSIRIS
0x018
QSSI Masked Interrupt Status
0x0000.0000
RO
SSIMIS
0x01C
QSSI Interrupt Clear
0x0000.0000
W1C
SSIICR
0x020
QSSI DMA Control
0x0000.0000
RW
SSIDMACTL
0x024
QSSI Peripheral Properties
0x0000.000D
RO
SSIPP
0xFC0
QSSI Clock Configuration
0x0000.0000
RW
SSICC
0xFC8
QSSI Peripheral Identification 4
0x0000.0000
RO
SSIPeriphID4
0xFD0
QSSI Peripheral Identification 5
0x0000.0000
RO
SSIPeriphID5
0xFD4
QSSI Peripheral Identification 6
0x0000.0000
RO
SSIPeriphID6
0xFD8
QSSI Peripheral Identification 7
0x0000.0000
RO
SSIPeriphID7
0xFDC
QSSI Peripheral Identification 0
0x0000.0022
RO
SSIPeriphID0
0xFE0
QSSI Peripheral Identification 1
0x0000.0000
RO
SSIPeriphID1
0xFE4
QSSI Peripheral Identification 2
0x0000.0018
RO
SSIPeriphID2
0xFE8
QSSI Peripheral Identification 3
0x0000.0001
RO
SSIPeriphID3
0xFEC
QSSI PrimeCell Identification 0
0x0000.000D
RO
SSIPCellID0
0xFF0
QSSI PrimeCell Identification 1
0x0000.00F0
RO
SSIPCellID1
0xFF4
QSSI PrimeCell Identification 2
0x0000.0005
RO
SSIPCellID2
0xFF8
QSSI PrimeCell Identification 3
0x0000.00B1
RO
SSIPCellID3
0xFFC
20.6
Register Descriptions
The remainder of this section lists and describes the QSSI registers, in numerical order by address
offset.
offset.
December 13, 2013
1392
Texas Instruments-Advance Information
Quad Synchronous Serial Interface (QSSI)