Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Description
Reset
Type
Name
Bit/Field
MII Write
Description
Value
Read operation is active and read data is placed in the MII Data
register (EMACMIIDATA).
register (EMACMIIDATA).
0
PHY is notified that this is a write operation using the MII Data
Register (EMACMIIDATA).
Register (EMACMIIDATA).
1
0x0
RW
MIIW
1
MII Busy
Indicates whether the MII is busy with a read or write access.
This bit should read logic 0 before writing to the EMACMIIADDR register
or the EMACMIIDATA register. During a PHY register access, the
software sets this bit to indicate that a read or write access is in progress.
or the EMACMIIDATA register. During a PHY register access, the
software sets this bit to indicate that a read or write access is in progress.
The EMACMIIDATA register is invalid until this bit is cleared by the
MAC. Therefore, EMACMIIDATA should be kept valid until the MAC
clears this bit during a PHY Write operation. Similarly for a read
operation, the contents of EMACMIIDATA are not valid until this bit is
cleared.
MAC. Therefore, EMACMIIDATA should be kept valid until the MAC
clears this bit during a PHY Write operation. Similarly for a read
operation, the contents of EMACMIIDATA are not valid until this bit is
cleared.
Description
Value
EMACMIIADDR and EMACMIIDATA are available for reads
and writes.
and writes.
0
Read or write access is in progress.
1
The subsequent read or write operations should happen only after the
previous operation is complete.
previous operation is complete.
0x0
RW
MIIB
0
December 13, 2013
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Texas Instruments-Advance Information
Ethernet Controller