Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Register 50: Ethernet MAC PPS0 Interval (EMACPPS0INTVL), offset 0x760
The MAC PPS0 Interval (EMACPPS0INTVL) register contains the number of units of sub-second
increment value between the rising edges of
increment value between the rising edges of
EN0PPS
signal output.
Note:
The PTP reference clock referred to below is MOSC clock in course update mode and in
fine correction mode, is the clock tick at which the system time gets updated.
fine correction mode, is the clock tick at which the system time gets updated.
Ethernet MAC PPS0 Interval (EMACPPS0INTVL)
Base 0x400E.C000
Offset 0x760
Type RW, reset 0x0000.0000
Offset 0x760
Type RW, reset 0x0000.0000
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
PPS0INT
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
PPS0INT
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
Description
Reset
Type
Name
Bit/Field
PPS0 Output Signal Interval
These bits store the interval between the rising edges of the
EN0PPS
signal output in terms of units of sub-second increment value.
It must be programmed one value less than the required interval. For
example, if the PTP reference clock is 25 MHz (period of 40 ns), and
desired interval between rising edges of
example, if the PTP reference clock is 25 MHz (period of 40 ns), and
desired interval between rising edges of
EN0PPS
signal output is 120
ns (that is, three units of sub-second increment value), then you should
program value 2 (3 -1) in this register.
program value 2 (3 -1) in this register.
0x0
RW
PPS0INT
31:0
1745
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller