Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Description
Reset
Type
Name
Bit/Field
Disable Write Buffer
Description
Value
No effect.
0
Disables write buffer use during default memory map accesses.
In this situation, all bus faults are precise bus faults but
performance is decreased because any store to memory must
complete before the processor can execute the next instruction.
In this situation, all bus faults are precise bus faults but
performance is decreased because any store to memory must
complete before the processor can execute the next instruction.
1
Note:
This bit only affects write buffers implemented in the
Cortex-M4 processor.
Cortex-M4 processor.
0
RW
DISWBUF
1
Disable Interrupts of Multiple Cycle Instructions
Description
Value
No effect.
0
Disables interruption of load multiple and store multiple
instructions. In this situation, the interrupt latency of the
processor is increased because any
instructions. In this situation, the interrupt latency of the
processor is increased because any
LDM
or
STM
must complete
before the processor can stack the current state and enter the
interrupt handler.
interrupt handler.
1
0
RW
DISMCYC
0
175
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller