Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Description
Reset
Type
Name
Bit/Field
Chip Select 0 (CS0)/Enable 0 (E0) Polarity Control
CS0 is active low by default. E0 is active high by default.
Description
Value
CS0/E0 (
LCDAC
) are not inverted. CS0 remains active low and
E0 remains active high.
0
Invert CS0/E0. CS0 is active high and E0 is active low.
1
0
RW
CS0E0
6
Write Strobe (WR) /Direction (DIR) Polarity Control
WR active low by default. DIR is write low/read high by default.
Description
Value
WR/DIR (
LCDLP
) are not inverted. WR remains active low and
DIR is write low/read high.
0
Invert WR/DIR. WR is active high and DIR is write high/read
low.
low.
1
0
RW
WRDIRINV
5
Read Strobe (RD) /Direct Enable (EN) Polarity Control
RD is active low by default. EN is active high by default.
Description
Value
RD/EN (
LCDCP
) are not inverted. RD is active low and EN is
active high.
0
Invert RD/EN (
LCDCP
). RD is active high and EN is active low.
1
0
RW
RDEN
4
Address Latch Enable (ALE) Polarity Control
ALE is active low by default.
Description
Value
ALE (
LCDFP
) is not inverted.
0
Invert ALE (
LCDFP
) . ALE is active high.
1
0
RW
ALE
3
LIDD Mode Select.
Selects type of LCD display interface for the LIDD to drive. See Table
26-3 on page 1850 for external pin assignments based on
26-3 on page 1850 for external pin assignments based on
MODE
encoding.
Description
Value
Synchronous Motorola 6800 Mode
0x0
Asynchronous Motorola 6800 Mode
0x1
Synchronous Intel 8080 mode
0x2
Asynchronous Intel 8080 mode
0x3
Asynchronous Hitachi mode
0x4
reserved
0x5-0x7
0x0
RW
MODE
2:0
The
MODE
bit field described above defines the function of the LCD external pins as follows:
December 13, 2013
1874
Texas Instruments-Advance Information
LCD Controller