Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 데이터 시트
제품 코드
DK-TM4C129X
Description
Reset
Type
Name
Bit/Field
GPIO Retention/Clear
This bit is used when the VDD3ON bit is set.This bit is must be set when
entering the hibernate state when the VDD3ON bit is set. This does not
affect behavior when VDD3ON is clear.
entering the hibernate state when the VDD3ON bit is set. This does not
affect behavior when VDD3ON is clear.
Note:
This bit must be set when enabling VDD3ON mode.
Description
Value
GPIO retention is released when power is reapplied. The GPIOs
are initialized to default values.
are initialized to default values.
0
GPIO retention set until software clears this bit.
1
0
RW
RETCLR
30
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
RO
reserved
29:20
Oscillator Select
This bit is used to select between the use of an external 32.768-kHz
source or the HIB internal low frequency oscillator (HIB LFIOSC).
source or the HIB internal low frequency oscillator (HIB LFIOSC).
Note:
To enable the HIB LFIOSC,
CLK32EN
must be programmed
to 1 at the same time the
OSCSEL
bit is set. Thus the HIBCTL
register should be written with 0x0008.0040
Description
Value
External 32.786-kHZ clock source is enabled.
0
HIB Low frequency oscillator (HIB LFIOSC) is enabled.
1
Note:
The HIB low-frequency oscillator has a wide frequency
variation, therefore the RTC is not accurate when using this
clock source.
variation, therefore the RTC is not accurate when using this
clock source.
0
RW
OSCSEL
19
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
RO
reserved
18
Oscillator Drive Capability
This bit is used to compensate for larger or smaller filtering capacitors.
Note:
This bit is not meant to be changed once the Hibernation
oscillator has started. Oscillator stability is not guaranteed if
the user changes this value after the oscillator is running.
oscillator has started. Oscillator stability is not guaranteed if
the user changes this value after the oscillator is running.
Description
Value
Low drive strength is enabled, 12 pF.
0
High drive strength is enabled, 24 pF.
1
0
RW
OSCDRV
17
Oscillator Bypass
Description
Value
The internal 32.768-kHz Hibernation oscillator is enabled. This
bit should be cleared when using an external 32.768-kHz crystal.
bit should be cleared when using an external 32.768-kHz crystal.
0
The internal 32.768-kHz Hibernation oscillator is disabled and
powered down. This bit should be set when using a single-ended
oscillator attached to
powered down. This bit should be set when using a single-ended
oscillator attached to
XOSC0
.
1
0
RW
OSCBYP
16
December 13, 2013
588
Texas Instruments-Advance Information
Hibernation Module