Texas Instruments DM6467 Digital Video Evaluation Module TMDXEVM6467T TMDXEVM6467T 데이터 시트
제품 코드
TMDXEVM6467T
SPRS605C – JULY 2009 – REVISED JUNE 2012
7.20.3.3 ATA Ultra DMA Timing
Table 7-92. Timings for ATA Module — Ultra DMA AC Timing
(1) (2)
(see
through
-1G
NO.
UNIT
MODE
MIN
MAX
28
f
(SYSCLK4)
Operating frequency, SYSCLK4
0-5
25
MHz
0
240
ns
1
160
ns
2
120
ns
1
t
2CYCTYP
Typical sustained average two cycle time
3
90
ns
4
60
ns
5
40
ns
2
t
CYC
Cycle time, Strobe edge to Strobe edge
0-5
(UDMASTB + 1)P
ns
Two cycle time, rising to rising edge or falling to
3
t
2CYC
0-5
2(UDMASTB + 1)P
ns
falling edge
0
15
ns
1
10
ns
4
t
DS
Data setup, data valid before STROBE edge
2-3
7
ns
4
5
ns
5
4
ns
0-4
5
ns
5
t
DH
Data hold, data valid after STROBE edge
5
4.6
ns
0
70
ns
1
48
ns
2
31
ns
Data valid INPUT setup time, data valid before
STROBE
STROBE
3
20
ns
6
t
DVS
4
6.7
ns
5
4.8
ns
Data valid OUTPUT setup time, data valid before
0-5
(UDMASTB)P - 3.1
ns
STROBE
0-4
6.2
ns
Data valid INPUT hold time, data valid after
STROBE
STROBE
5
4.8
ns
7
t
DVH
Data valid OUTPUT hold time, data valid after
0-5
1P - 2
ns
STROBE
CRC word valid setup time at host, CRC valid
10
t
CVS
0-5
P
ns
before DMACK negation
CRC word valid hold time at sender, CRC valid
11
t
CVH
0-5
2P
ns
after DMACK negation
0-4
0
ns
Time from STROBE output released-to-driving
12
t
ZFS
until the first transition of critical timing
5
35
ns
0
70
ns
1
48
ns
2
31
ns
Time from data output released-to-driving until
13
t
DZFS
the first transition of critical timing
3
20
ns
4
6.7
ns
5
25
ns
(1)
P = SYSCLK4 period, in ns, for ATA. For example, when running the DSP CPU at 1 GHz, use P = 7 ns.
(2)
UDMASTB equals the value programmed in the UDMSTBxP bit field in the UDMASTB register. UDMATRP equals the value
programmed in the UDMTRPxP bit field in the UDMATRP register. TENV equals the value programmed in the UDMATNVxP bit field in
the UDMATENV register. For more detailed information, see the TMS320DM646x DMSoC ATA Controller User's Guide (literature
number
programmed in the UDMTRPxP bit field in the UDMATRP register. TENV equals the value programmed in the UDMATNVxP bit field in
the UDMATENV register. For more detailed information, see the TMS320DM646x DMSoC ATA Controller User's Guide (literature
number
Copyright © 2009–2012, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
285
Product Folder Link(s):