Texas Instruments DM6467 Digital Video Evaluation Module TMDXEVM6467T TMDXEVM6467T 데이터 시트
제품 코드
TMDXEVM6467T
SPRS605C – JULY 2009 – REVISED JUNE 2012
Slave Mode — General
Table 7-112. General Switching Characteristics in Slave Mode (For 3-/4-/5-Pin Modes)
(1)
-1G
NO.
PARAMETER
UNIT
MIN
MAX
Delay time, transmit rising edge of SPI_CLK to SPI_SOMI output
15
valid, 3-/4-/5-pin mode, polarity = 0, phase = 0
Delay time, transmit falling edge of SPI_CLK to SPI_SOMI output
15
valid, 3-/4-/5-pin mode, polarity = 0, phase = 1
13
t
d(CLK-SOMI)
ns
Delay time, transmit falling edge of SPI_CLK to SPI_SOMI output
15
valid, 3-/4-/5-pin mode, polarity = 1, phase = 0
Delay time, transmit rising edge of SPI_CLK to SPI_SOMI output
15
valid, 3-/4-/5-pin mode, polarity = 1, phase = 1
Output hold time, SPI_SOMI valid (except final bit) after receive
0.5T – 4
falling edge of SPI_CLK, 3-/4-/5-pin mode, polarity = 0, phase = 0
Output hold time, SPI_SOMI valid (except final bit) after receive
0.5T – 4
rising edge of SPI_CLK, 3-/4-/5-pin mode, polarity = 0, phase = 1
14
t
oh(CLK-SOMI)
ns
Output hold time, SPI_SOMI valid (except final bit) after receive
0.5T – 4
rising edge of SPI_CLK, 3-/4-/5-pin mode, polarity = 1, phase = 0
Output hold time, SPI_SOMI valid (except final bit) after receive
0.5T – 4
falling edge of SPI_CLK, 3-/4-/5-pin mode, polarity = 1, phase = 1
(1)
T = period of SPI_CLK
314
Peripheral Information and Electrical Specifications
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