Microchip Technology MA240029 데이터 시트
2010-2011 Microchip Technology Inc.
DS39996F-page 395
PIC24FJ128GA310 FAMILY
INDEX
A
A/D
Extended DMA Operations ....................................... 297
Operation .................................................................. 295
Registers................................................................... 298
Operation .................................................................. 295
Registers................................................................... 298
AC Characteristics
A/D Conversion Timing ............................................. 375
Internal RC Accuracy ................................................ 371
Load Conditions and Requirements for
Internal RC Accuracy ................................................ 371
Load Conditions and Requirements for
B
Block Diagrams
10-Bit A/D Converter Analog Input Model................. 311
12-Bit A/D Converter................................................. 296
16-Bit Asynchronous Timer3 and Timer5 ................. 201
16-Bit Synchronous Timer2 and Timer4 ................... 201
16-Bit Timer1 Module................................................ 197
32-Bit Timer2/3 and Timer4/5 ................................... 200
Accessing Program Space Using
12-Bit A/D Converter................................................. 296
16-Bit Asynchronous Timer3 and Timer5 ................. 201
16-Bit Synchronous Timer2 and Timer4 ................... 201
16-Bit Timer1 Module................................................ 197
32-Bit Timer2/3 and Timer4/5 ................................... 200
Accessing Program Space Using
Addressing for Table Registers................................... 83
Buffer Address Generation in PIA Mode................... 299
CALL Stack Frame...................................................... 68
Comparator Voltage Reference ................................ 321
CPU Programmer’s Model .......................................... 37
CRC .......................................................................... 289
CRC Shift Engine Detail............................................ 289
CTMU Connections and Internal Configuration
Buffer Address Generation in PIA Mode................... 299
CALL Stack Frame...................................................... 68
Comparator Voltage Reference ................................ 321
CPU Programmer’s Model .......................................... 37
CRC .......................................................................... 289
CRC Shift Engine Detail............................................ 289
CTMU Connections and Internal Configuration
Data Signal Modulator .............................................. 249
DMA ............................................................................ 75
EDS Address Generation for Read............................. 66
EDS Address Generation for Write ............................. 67
High/Low-Voltage Detect (HLVD) ............................. 331
I
DMA ............................................................................ 75
EDS Address Generation for Read............................. 66
EDS Address Generation for Write ............................. 67
High/Low-Voltage Detect (HLVD) ............................. 331
I
2
Input Capture ............................................................ 205
LCD Controller .......................................................... 265
On-Chip Regulator Connections ............................... 343
Output Compare (16-Bit Mode)................................. 212
Output Compare (Double-Buffered,
LCD Controller .......................................................... 265
On-Chip Regulator Connections ............................... 343
Output Compare (16-Bit Mode)................................. 212
Output Compare (Double-Buffered,
PCI24FJ256GA310 Family (General) ......................... 16
PIC24F CPU Core ...................................................... 36
PSV Operation (Lower Word) ..................................... 73
PSV Operation (Upper Word) ..................................... 73
Reset System.............................................................. 89
RTCC ........................................................................ 275
PIC24F CPU Core ...................................................... 36
PSV Operation (Lower Word) ..................................... 73
PSV Operation (Upper Word) ..................................... 73
Reset System.............................................................. 89
RTCC ........................................................................ 275
Shared I/O Port Structure ......................................... 167
SPI Master, Frame Master Connection .................... 230
SPI Master, Frame Slave Connection ...................... 230
SPI Master/Slave Connection (Enhanced
SPI Master, Frame Master Connection .................... 230
SPI Master, Frame Slave Connection ...................... 230
SPI Master/Slave Connection (Enhanced
SPI Master/Slave Connection (Standard Mode)....... 229
SPI Slave, Frame Master Connection ...................... 230
SPI Slave, Frame Slave Connection ........................ 230
SPIx Module (Enhanced Mode)................................ 223
SPIx Module (Standard Mode) ................................. 222
System Clock............................................................ 145
Triple Comparator Module........................................ 315
UART (Simplified)..................................................... 241
Watchdog Timer (WDT)............................................ 344
SPI Slave, Frame Master Connection ...................... 230
SPI Slave, Frame Slave Connection ........................ 230
SPIx Module (Enhanced Mode)................................ 223
SPIx Module (Standard Mode) ................................. 222
System Clock............................................................ 145
Triple Comparator Module........................................ 315
UART (Simplified)..................................................... 241
Watchdog Timer (WDT)............................................ 344
C
C Compilers
Charge Time Measurement Unit. See CTMU.
Code Examples
Code Examples
EDS Read From Program Memory in Assembly ........ 72
EDS Read in Assembly .............................................. 66
EDS Write in Assembly .............................................. 67
Erasing a Program Memory Block (Assembly)........... 86
Erasing a Program Memory Block (C Language)....... 87
Initiating a Programming Sequence ........................... 87
Loading the Write Buffers ........................................... 87
Port Read/Write in Assembly.................................... 172
Port Read/Write in C................................................. 172
PWRSAV Instruction Syntax .................................... 156
Setting the RTCWREN Bit........................................ 276
Single-Word Flash Programming ............................... 88
Single-Word Flash Programming (C Language) ........ 88
EDS Read in Assembly .............................................. 66
EDS Write in Assembly .............................................. 67
Erasing a Program Memory Block (Assembly)........... 86
Erasing a Program Memory Block (C Language)....... 87
Initiating a Programming Sequence ........................... 87
Loading the Write Buffers ........................................... 87
Port Read/Write in Assembly.................................... 172
Port Read/Write in C................................................. 172
PWRSAV Instruction Syntax .................................... 156
Setting the RTCWREN Bit........................................ 276
Single-Word Flash Programming ............................... 88
Single-Word Flash Programming (C Language) ........ 88
Configuration Protection ........................................... 346
General Segment Protection .................................... 345
General Segment Protection .................................... 345
Configuration Bits ............................................................. 333
Core Features..................................................................... 11
CPU
Core Features..................................................................... 11
CPU
Arithmetic Logic Unit (ALU) ........................................ 40
Control Registers........................................................ 38
Core Registers............................................................ 36
Programmer’s Model .................................................. 35
Control Registers........................................................ 38
Core Registers............................................................ 36
Programmer’s Model .................................................. 35
CRC
CTMU