Microchip Technology MA240029 데이터 시트
2010-2011 Microchip Technology Inc.
DS39996F-page 397
PIC24FJ128GA310 FAMILY
Interrupts
Control and Status Registers ...................................... 98
Implemented Vectors .................................................. 97
Reset Sequence ......................................................... 95
Setup and Service Procedures ................................. 143
Trap Vectors ............................................................... 96
Vector Table................................................................ 96
Implemented Vectors .................................................. 97
Reset Sequence ......................................................... 95
Setup and Service Procedures ................................. 143
Trap Vectors ............................................................... 96
Vector Table................................................................ 96
J
K
L
LCD Controller .................................................................... 12
Liquid Crystal Display (LCD) Controller ............................ 265
Liquid Crystal Display (LCD) Controller ............................ 265
M
Memory Organization.......................................................... 41
Microchip Internet Web Site.............................................. 400
Modulator. See Data Signal Modulator. ............................ 249
MPLAB ASM30 Assembler, Linker, Librarian ................... 348
MPLAB Integrated Development
Microchip Internet Web Site.............................................. 400
Modulator. See Data Signal Modulator. ............................ 249
MPLAB ASM30 Assembler, Linker, Librarian ................... 348
MPLAB Integrated Development
MPLAB PM3 Device Programmer .................................... 350
MPLAB REAL ICE In-Circuit Emulator System................. 349
MPLINK Object Linker/MPLIB Object Librarian ................ 348
MPLAB REAL ICE In-Circuit Emulator System................. 349
MPLINK Object Linker/MPLIB Object Librarian ................ 348
N
O
Oscillator Configuration
Bit Values for Clock Selection................................... 146
Clock Switching......................................................... 150
Clock Switching......................................................... 150
Control Registers ...................................................... 147
CPU Clocking Scheme ............................................. 146
Initial Configuration on POR ..................................... 146
Reference Clock Output............................................ 152
Secondary Oscillator (SOSC) ................................... 152
CPU Clocking Scheme ............................................. 146
Initial Configuration on POR ..................................... 146
Reference Clock Output............................................ 152
Secondary Oscillator (SOSC) ................................... 152
Output Compare
P
Details ....................................................................... 379
Marking ..................................................................... 377
Marking ..................................................................... 377
Available Peripherals and Pins ................................. 173
Configuration Control ................................................ 176
Considerations for Use ............................................. 177
Input Mapping ........................................................... 174
Mapping Exceptions.................................................. 176
Output Mapping ........................................................ 175
Peripheral Priority ..................................................... 173
Registers................................................................... 178
Configuration Control ................................................ 176
Considerations for Use ............................................. 177
Input Mapping ........................................................... 174
Mapping Exceptions.................................................. 176
Output Mapping ........................................................ 175
Peripheral Priority ..................................................... 173
Registers................................................................... 178
Pin Descriptions
Clock Frequency and Clock Switching ..................... 165
Doze Mode ............................................................... 165
Instruction-Based Modes.......................................... 156
Doze Mode ............................................................... 165
Instruction-Based Modes.......................................... 156
Deep Sleep....................................................... 158
Idle.................................................................... 157
Sleep ................................................................ 157
Idle.................................................................... 157
Sleep ................................................................ 157
Low-Voltage
Access Using Table Instructions ................................ 71
Address Construction ................................................. 69
Address Space ........................................................... 41
Flash Configuration Words ......................................... 42
Hard Memory Vectors................................................. 42
Memory Maps............................................................. 41
Organization ............................................................... 42
Reading From Program Memory Using EDS ............. 72
Address Construction ................................................. 69
Address Space ........................................................... 41
Flash Configuration Words ......................................... 42
Hard Memory Vectors................................................. 42
Memory Maps............................................................. 41
Organization ............................................................... 42
Reading From Program Memory Using EDS ............. 72
Program Verification ......................................................... 345
Pulse-Width Modulation (PWM) Mode.............................. 213
Pulse-Width Modulation. See PWM.
PWM
Pulse-Width Modulation (PWM) Mode.............................. 213
Pulse-Width Modulation. See PWM.
PWM
R
Reader Response............................................................. 401
Real-Time Clock and Calendar (RTCC) ........................... 275
Register Maps
Real-Time Clock and Calendar (RTCC) ........................... 275
Register Maps
A/D Converter............................................................. 56
Analog Configuration .................................................. 57
Comparators............................................................... 61
CPU Core ................................................................... 45
CRC............................................................................ 62
CTMU ......................................................................... 57
Data Signal Modulator (DSM)..................................... 61
Deep Sleep................................................................. 64
DMA............................................................................ 58
I
Analog Configuration .................................................. 57
Comparators............................................................... 61
CPU Core ................................................................... 45
CRC............................................................................ 62
CTMU ......................................................................... 57
Data Signal Modulator (DSM)..................................... 61
Deep Sleep................................................................. 64
DMA............................................................................ 58
I
ICN ............................................................................. 46
Input Capture.............................................................. 49
Interrupt Controller...................................................... 47
LCD Controller............................................................ 59
NVM............................................................................ 64
Output Compare ......................................................... 50
Pad Configuration....................................................... 55
Parallel Master/Slave Port .......................................... 60
Peripheral Pin Select .................................................. 62
PMD............................................................................ 64
PORTA ....................................................................... 53
PORTB ....................................................................... 53
PORTC ....................................................................... 54
PORTD ....................................................................... 54
PORTE ....................................................................... 54
PORTF ....................................................................... 55
PORTG....................................................................... 55
RTCC.......................................................................... 61
SPI.............................................................................. 53
System Control ........................................................... 63
Timers......................................................................... 48
UART.......................................................................... 52
Input Capture.............................................................. 49
Interrupt Controller...................................................... 47
LCD Controller............................................................ 59
NVM............................................................................ 64
Output Compare ......................................................... 50
Pad Configuration....................................................... 55
Parallel Master/Slave Port .......................................... 60
Peripheral Pin Select .................................................. 62
PMD............................................................................ 64
PORTA ....................................................................... 53
PORTB ....................................................................... 53
PORTC ....................................................................... 54
PORTD ....................................................................... 54
PORTE ....................................................................... 54
PORTF ....................................................................... 55
PORTG....................................................................... 55
RTCC.......................................................................... 61
SPI.............................................................................. 53
System Control ........................................................... 63
Timers......................................................................... 48
UART.......................................................................... 52