Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트

Sensors

36

Freescale Semiconductor, Inc.

FIFO Status when F_SETUP[f_mode] = 0x00 > 0x00.

If the FIFO subsystem data output register driver is enabled, the status register indicates the current status information of the 
FIFO subsystem.

  

The f_ovf and f_wmrk_flag flags remain asserted while the event source is still active, but the user can clear the FIFO interrupt 
bit in the interrupt source register (INT_SOURCE) by reading the F_STATUS register. In this case, the INT_SOURCE[src_fifo] 
bit will be set again when the next data sample enters the FIFO.

Therefore the f_ovf bit will remain asserted while the FIFO has overflowed and the f_wmrk_flag bit will remain asserted while the 
f_cnt value is equal to or greater than then f_wmrk value.

zyxdr

zyxdr signals that a new acquisition for any of the enabled channels is available. zyxdr is cleared when the high-bytes of the 
acceleration data (OUT_X_MSB, OUT_Y_MSB, OUT_Z_MSB) are read.
X, Y, Z-axis new data ready. 
0: No new set of data ready 
1: New set of data is ready

zdr

zdr is set to 1 whenever a new Z-axis data acquisition is completed. zdr is cleared anytime the OUT_Z_MSB register is read.
Z-axis new data available. 
0: No new Z-axis data is ready
1: New Z-axis data is ready

ydr

ydr is set to 1 whenever a new Y-axis data acquisition is completed. ydr is cleared anytime the OUT_Y_MSB register is read.
Y-axis new data available. Default value: 0 
0: No new Y-axis data ready
1: New Y-axis data is ready

xdr

xdr is set to 1 whenever a new X-axis data acquisition is completed. xdr is cleared anytime the OUT_X_MSB register is read.
X-axis new data available. Default value: 0 
0: No new X-axis data ready
1: New X-axis data is ready

f_ovf

f_wmrk_flag

f_cnt[5:0]

0

0

0b00_0000

0

X

No FIFO overflow events detected.

1

X

FIFO overflow event detected. 

X

0

No FIFO watermark event detected.

X

1

A FIFO Watermark event was detected indicating that a FIFO sample count greater than watermark 
value has been reached.
If F_SETUP[f_mode] = 0b11, a FIFO trigger event was detected

f_cnt[5:0]

These bits indicate the number of acceleration samples currently stored in the FIFO buffer. Count 0b00_0000 indicates 
that the FIFO is empty.
FIFO sample counter. Default value 0b00_0000.
(0b00_0001 to 0b10_0000 indicates 1 to 32 samples stored in FIFO