Freescale Semiconductor FRDM-FXS-MULTI 데이터 시트

Sensors

44

Freescale Semiconductor, Inc.

 

 

Please note that the routing configuration for the magnetic-threshold interrupt is controlled by m_ths_int_cfg bit located in register 
0x52 (MAG_THS_CFG), and the magnetic vector-magnitude function routing is controlled by m_vecm_int_cfg bit in register 0x69 
(M_VECM_CFG).

int_cfg_aslp

int_cfg_fifo

int_cfg_trans

int_cfg_lndprt

 int_cfg_pulse

int_cfg_ffmt

int_cfg_a_vecm

int_cfg_drdy

0

0

0

0

0

0

0

0

int_cfg_aslp

Sleep interrupt routing
0: Interrupt is routed to INT2 pin
1: Interrupt is routed to INT1 pin

int_cfg_fifo

FIFO interrupt routing
0: Interrupt is routed to INT2 pin
1: Interrupt is routed to INT1 pin

int_cfg_trans

Transient detection interrupt routing 
0: Interrupt is routed to INT2 pin
1: Interrupt is routed to INT1 pin

int_cfg_lndprt

Orientation detection interrupt routing
0: Interrupt is routed to INT2 pin
1: Interrupt is routed to INT1 pin

int_cfg_pulse

Pulse detection interrupt routing
0: Interrupt is routed to INT2 pin 
1: Interrupt is routed to INT1 pin

int_cfg_ffmt

Freefall/motion detection interrupt routing
0: Interrupt is routed to INT2 pin
1: Interrupt is routed to INT1 pin

int_cfg_a_vecm

Acceleration vector-magnitude interrupt routing
0: Interrupt is routed to INT2 pin
1: Interrupt is routed to INT1 pin.

int_cfg_drdy

Data-ready interrupt routing
0: Interrupt is routed to INT2 pin
1: Interrupt is routed to INT1 pin