Texas Instruments 28xxx 사용자 설명서
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CA
CA
CA
CA
CB
CB
CB
CB
TBCTR
EPWMxA
EPWMxB
TBPRD
value
Action-Qualifier (AQ) Submodule
Figure 2-25. Up-Down-Count, Dual Edge Symmetric Waveform, With Independent Modulation on
EPWMxA and EPWMxB — Complementary
A
PWM period = 2
×
TBPRD
×
T
TBCLK
B
Duty modulation for EPWMxA is set by CMPA, and is active low, i.e., low time duty proportional to CMPA
C
Duty modulation for EPWMxB is set by CMPB and is active high, i.e., high time duty proportional to CMPB
D
Outputs EPWMx can drive upper/lower (complementary) power switches
E
Dead-band = CMPB - CMPA (fully programmable edge placement by software). Note the dead-band module is also
available if the more classical edge delay method is required.
available if the more classical edge delay method is required.
contains a code sample showing initialization and run time for the waveforms in
Use the code in
to define the headers.
Example 2-6. Code Sample for
// Initialization Time
// = = = = = = = = = = = = = = = = = = = = = = =
// = = = = = = = = = = = = = = = = = = = = = = =
=
EPwm1Regs.TBPRD = 600;
// Period = 2
×
600 TBCLK counts
EPwm1Regs.CMPA.half.CMPA = 350;
// Compare A = 350 TBCLK counts
EPwm1Regs.CMPB = 400;
// Compare B = 400 TBCLK counts
EPwm1Regs.TBPHS = 0;
// Set Phase register to zero
EPwm1Regs.TBCNT = 0;
// clear TB counter
EPwm1Regs.TBCTL.bit.CTRMODE = TB_UPDOWN;
// Symmetric
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
// Phase loading disabled
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
// TBCLK = SYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
// load on CTR = Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// load on CTR = Zero
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CBD = AQ_SET;
// Run Time
// = = = = = = = = = = = = = = = = = = = = = = =
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CBD = AQ_SET;
// Run Time
// = = = = = = = = = = = = = = = = = = = = = = =
=
EPwm1Regs.CMPA.half.CMPA = Duty1A;
// adjust duty for output EPWM1A
EPwm1Regs.CMPB = Duty1B;
// adjust duty for output EPWM1B
48
ePWM Submodules
SPRU791D – November 2004 – Revised October 2007