Renesas SH7709S Manual Do Utilizador

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Rev. 5.00, 09/03, page 127 of 760
Interrupt Source
INTEVT Code
(INTEVT2 Code)
Interrupt
Priority
(Initial Value)
IPR (Bit
Numbers)
Priority
within IPR
Setting Unit
Default
Priority
RTC
ATI
H'480 (H'480)
0–15 (0)
IPRA (3–0)
High
High
PRI
H'4A0 (H'4A0)
CUI
H'4C0 (H'4C0)
Low
SCI
ERI
H'4E0 (H'4E0)
0–15 (0)
IPRB (7–4)
High
RXI
H'500 (H'500)
TXI
H'520 (H'520)
TEI
H'540 (H'540)
Low
WDT
ITI
H'560 (H'560)
0–15 (0)
IPRB (15–12) —
REF
RCMI
H'580 (H'580)
0–15 (0)
IPRB (11–8)
High
ROVI
H'5A0 (H'5A0)
Low
Low
Note:  
*
  The code corresponding to an interrupt level shown in table 6.6 is set.