Eccel Technology Ltd BIORADRDR0200 Manual Do Utilizador
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5 Communication Interface
5.1 I2C Bus
The RFID A1 Module provides a I2C slave bus. The advantages of the I2C are that it requires only two lines to
communicate and that multiple devices can be connected to the 2-wire same bus.
communicate and that multiple devices can be connected to the 2-wire same bus.
The implementation of I2C in the module complies with the 7-bit addressing I2C standard, thus the timing diagrams
for bit and frame representation will be omitted in this document. Each transmission on the I2C line begins with an
I2C START condition and ends with an I2C STOP condition. In between these events there could be as many repeated
STARTs as the user wants. The behaviour of the nBUSY line is the same for all buses, thus as well for I2C. The
module starts processing the command after receiving a stop condition on I2C bus.
for bit and frame representation will be omitted in this document. Each transmission on the I2C line begins with an
I2C START condition and ends with an I2C STOP condition. In between these events there could be as many repeated
STARTs as the user wants. The behaviour of the nBUSY line is the same for all buses, thus as well for I2C. The
module starts processing the command after receiving a stop condition on I2C bus.
5.1.1 I2C Address Construction
After reset or power-up when the module starts, it samples three IO lines (I2C AD0, I2C AD1 and I2C AD2) to
construct the I2C address to which it will respond. Thanks to this solution there is the possibility to connect to eight
such modules on one I2C bus. Byte wise the address sent on the I2C bus after START is constructed as follows:
construct the I2C address to which it will respond. Thanks to this solution there is the possibility to connect to eight
such modules on one I2C bus. Byte wise the address sent on the I2C bus after START is constructed as follows:
Table 5.1
5.1.2 Writing to the memory
Writing to the RFID A1 Module memory via the I2C bus is very similar to other memory type devices. A typical
transmission for writing to the registers is shown below in Table 5.2.
transmission for writing to the registers is shown below in Table 5.2.
Table 5.2
Bit number
7
6
5
4
3
2
1
0
Value
0
1
0
0
Sampled from AD2 Sampled from AD1 Sampled from AD0
-
Type
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Read / Write bit
Byte number
1
2
3
4
3 + n
Value
I2C Address + 0x00
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
0x00 - 0xFF
Type
START + I2C
address + Write
Address LSByte
Address MSByte
Data Byte 1
……..
Data Byte n + STOP