Freescale Semiconductor MSC8156 Evaluation Module MSC8156EVM MSC8156EVM Guia De Informação
Códigos do produto
MSC8156EVM
Features
MSC8156 Product Brief, Rev. 3
Freescale Semiconductor
3
A block diagram of the MSC8156 is shown in
. A separate block diagram for the SC3850 DSP
core platform is shown in
Figure 1. MSC8156 Block Diagram
Figure 2. StarCore SC3850 DSP
Subsystem Block Diagram
JTAG
Note: The arrow direction indicates master or slave.
DDR Interface 64/32-bit 800 MHz
4 T
D
M
s
DMA
3
2
c
h
I/O-Interrupt
Concentrator
UART
Clocks
Timers
Reset
Semaphores
Other
DDR
CLASS
High-Speed
Modules
QUICC
Four TDMs each supporting 8 E1
Boot ROM
I
2
C
Virtual
Interrupts
Controller
SPI
MAPLE-B
Twwo Serial RapidIO 1x/4x 3.125 Gbaud
Six DSP Cores at 1 GHz
Turbo/
Two SGMII
Viterbi
FFT/
IFFT
IFFT
DFT/
IDFT
IDFT
Two RGMII
M3 Memory
1056 Kbyte
PCI-Express 1x/2x/4x
Subsystem
SC3850
DSP Core
512 Kbyte
32 Kbyte 32 Kbyte
L1
ICache
L1
DCache
L2 Cache / M2 Memory
DDR Interface 64/32-bit 800 MHz
DDR
Controller
Two SGMII
Engine™
Serial
Interface
CRCU
Dual RISC Engine
Aggregated bandwidth of 240 Mbps
32 Kbyte
Address
Translation
Task
Protection
32 Kbyte
(WTB)
(WBB)
EPIC
Interrupts
P-bus 128 bit
Xa-bus 64 bit
Xb-bus 64-bit
DQBus
Debug Support
OCE30
512 Kbyte L2 Cache / M2 Memory
MMU
Timer
128 bits master
IQBus
DPU
SC3850
Core
TWB
Write-
Through
Buffer
Write-
Back
Buffer
Instruction
Cache
Data
Cache
bus to CLASS
128 bits slave
bus from CLASS
bus from CLASS